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Searched refs:CLKGEN0_REG (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DhalEMMflt.c118 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gCLKGEN0_Addr + ((addr)<<2)))) macro
365 u16Reg = CLKGEN0_REG(0x26); in HAL_EMMFLT_SrcSelect()
366 CLKGEN0_REG(0x26) = 0; in HAL_EMMFLT_SrcSelect()
385 u16Reg = CLKGEN0_REG(0x26); in HAL_EMMFLT_SrcSelect()
386 CLKGEN0_REG(0x26) = 0x404; in HAL_EMMFLT_SrcSelect()
460 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
462 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
466 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
468 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
490 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
H A DhalNDSRASP.c1136 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gClkGen_Addr + ((addr)<<2)))) macro
1158 u16Reg = CLKGEN0_REG(0x29); in HAL_NDSRASP_Livein_Config()
1161 CLKGEN0_REG(0x26) = u16Reg; in HAL_NDSRASP_Livein_Config()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DhalEMMflt.c118 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gCLKGEN0_Addr + ((addr)<<2)))) macro
365 u16Reg = CLKGEN0_REG(0x26); in HAL_EMMFLT_SrcSelect()
366 CLKGEN0_REG(0x26) = 0; in HAL_EMMFLT_SrcSelect()
385 u16Reg = CLKGEN0_REG(0x26); in HAL_EMMFLT_SrcSelect()
386 CLKGEN0_REG(0x26) = 0x404; in HAL_EMMFLT_SrcSelect()
460 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
462 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
466 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
468 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
490 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
H A DhalNDSRASP.c1136 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gClkGen_Addr + ((addr)<<2)))) macro
1158 u16Reg = CLKGEN0_REG(0x29); in HAL_NDSRASP_Livein_Config()
1161 CLKGEN0_REG(0x26) = u16Reg; in HAL_NDSRASP_Livein_Config()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DhalEMMflt.c118 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gCLKGEN0_Addr + ((addr)<<2)))) macro
365 u16Reg = CLKGEN0_REG(0x26); in HAL_EMMFLT_SrcSelect()
366 CLKGEN0_REG(0x26) = 0; in HAL_EMMFLT_SrcSelect()
385 u16Reg = CLKGEN0_REG(0x26); in HAL_EMMFLT_SrcSelect()
386 CLKGEN0_REG(0x26) = 0x404; in HAL_EMMFLT_SrcSelect()
460 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
462 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
466 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
468 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
490 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
H A DhalNDSRASP.c1136 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gClkGen_Addr + ((addr)<<2)))) macro
1158 u16Reg = CLKGEN0_REG(0x29); in HAL_NDSRASP_Livein_Config()
1161 CLKGEN0_REG(0x26) = u16Reg; in HAL_NDSRASP_Livein_Config()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/curry/nsk2/
H A DhalEMMflt.c116 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gCLKGEN0_Addr + ((addr)<<2)))) macro
362 u16Reg = CLKGEN0_REG(0x26); in HAL_EMMFLT_SrcSelect()
363 CLKGEN0_REG(0x26) = 0; in HAL_EMMFLT_SrcSelect()
382 u16Reg = CLKGEN0_REG(0x26); in HAL_EMMFLT_SrcSelect()
383 CLKGEN0_REG(0x26) = 0x404; in HAL_EMMFLT_SrcSelect()
440 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
442 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
446 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
448 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
470 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
H A DhalNDSRASP.c1136 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gClkGen_Addr + ((addr)<<2)))) macro
1158 u16Reg = CLKGEN0_REG(0x29); in HAL_NDSRASP_Livein_Config()
1161 CLKGEN0_REG(0x26) = u16Reg; in HAL_NDSRASP_Livein_Config()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DhalEMMflt.c118 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gCLKGEN0_Addr + ((addr)<<2)))) macro
395 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
397 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
401 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
403 CLKGEN0_REG(0x26) = u16Reg; in PrintSetting()
425 u16Reg = CLKGEN0_REG(0x26); in PrintSetting()
H A DhalNDSRASP.c1136 #define CLKGEN0_REG(addr) (*((volatile MS_U16*)(_gClkGen_Addr + ((addr)<<2)))) macro
1158 u16Reg = CLKGEN0_REG(0x29); in HAL_NDSRASP_Livein_Config()
1161 CLKGEN0_REG(0x26) = u16Reg; in HAL_NDSRASP_Livein_Config()