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Searched refs:CKG_S2_FCLK_GATED (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h811 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h793 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h857 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h972 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h927 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h984 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h921 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h989 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h976 #define CKG_S2_FCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmvideo.c557 …MDrv_WriteRegBit(REG_CKG_S2_FCLK, ENABLE, CKG_S2_FCLK_GATED); // Enable… in MApi_XC_Exit_U2()
1244 …MDrv_WriteRegBit(REG_CKG_S2_FCLK, DISABLE, CKG_S2_FCLK_GATED); // Enabl… in _MApi_XC_Init_WithoutCreateMutex()
H A Dmvideo.c.0554 …MDrv_WriteRegBit(REG_CKG_S2_FCLK, ENABLE, CKG_S2_FCLK_GATED); // Enable…
1241 …MDrv_WriteRegBit(REG_CKG_S2_FCLK, DISABLE, CKG_S2_FCLK_GATED); // Enabl…