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Searched refs:CKG_IDCLK2_MASK (Results 1 – 25 of 69) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_mux.c394 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
472 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
564 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_HDMI_DVI << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
618 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC0 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
623 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC1 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
H A Dmhal_ip.c226 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
227 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
233 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
234 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_mux.c394 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
472 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
560 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_HDMI_DVI << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
613 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC0 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
618 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC1 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
H A Dmhal_ip.c226 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
227 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
233 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
234 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_mux.c394 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
472 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
604 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC0 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
609 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC1 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
H A Dmhal_ip.c226 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
227 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
233 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
234 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_mux.c394 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
472 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
604 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC0 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
609 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC1 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
H A Dmhal_ip.c226 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
227 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
233 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
234 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_ip.c208 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
209 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
215 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
216 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
H A Dmhal_mux.c563 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
572 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_ip.c208 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
209 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
215 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
216 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
H A Dmhal_dip.c1023 u8Clk = (u8Clk & CKG_IDCLK2_MASK ) >>CKG_IDCLK2_SHIFT; in HAL_XC_DIP_MuxDispatch()
1069 u8Clk = (u8Clk & CKG_IDCLK2_MASK ) >>CKG_IDCLK2_SHIFT; in HAL_XC_DIP_MuxDispatch()
1085 u8Clk = (u8Clk & CKG_IDCLK2_MASK ) >>CKG_IDCLK2_SHIFT; in HAL_XC_DIP_MuxDispatch()
1125 u8Clk = (u8Clk & CKG_IDCLK2_MASK ) >>CKG_IDCLK2_SHIFT; in HAL_XC_DIP_MuxDispatch()
H A Dmhal_mux.c563 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
572 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_mux.c460 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
469 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
H A Dmhal_ip.c228 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
229 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
235 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
236 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c512 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
521 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
H A Dmhal_ip.c228 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
229 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
235 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
236 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_mux.c490 MDrv_WriteByteMask(REG_CKG_IDCLK2, u8Clk_Mux << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_set_mainwin_ip_mux()
499 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
H A Dmhal_ip.c228 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
229 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
235 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
236 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_ip.c219 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
220 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
226 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
227 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_ip.c253 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
254 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
260 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
261 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_ip.c219 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
220 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
226 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
227 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_ip.c219 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
220 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
226 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
227 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_ip.c228 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
229 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
235 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
236 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_ip.c219 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
220 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()
226 …MDrv_WriteByteMask(REG_CKG_IDCLK2, CKG_IDCLK2_XTAL, CKG_IDCLK2_MASK); // Main window reset to XTAL… in Hal_SC_ip_software_reset()
227 …MDrv_WriteByteMask(REG_CKG_IDCLK2, u8CLK2Mux, CKG_IDCLK2_MASK); // Main window reset to XTAL when … in Hal_SC_ip_software_reset()

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