Home
last modified time | relevance | path

Searched refs:CKG_EDCLK_F1_345MHZ (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h621 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h619 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h601 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h701 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h661 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h713 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h651 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h718 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h705 #define CKG_EDCLK_F1_345MHZ (2 << 2) macro
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmvideo.c1192 Hal_SC_set_edclk(pInstance, CKG_EDCLK_F1_345MHZ, ENABLE, SUB_WINDOW); in _MApi_XC_Init_WithoutCreateMutex()
1226 Hal_SC_set_edclk(pInstance, CKG_EDCLK_F1_345MHZ, ENABLE, SUB_WINDOW); in _MApi_XC_Init_WithoutCreateMutex()
H A Dmvideo.c.01189 Hal_SC_set_edclk(pInstance, CKG_EDCLK_F1_345MHZ, ENABLE, SUB_WINDOW);
1223 Hal_SC_set_edclk(pInstance, CKG_EDCLK_F1_345MHZ, ENABLE, SUB_WINDOW);