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Searched refs:CKG_DC0_108MHZ (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pws/hal/maldives/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6 << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/k6/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6 << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/macan/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mooney/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/
H A DregMVOP.h416 #define CKG_DC0_108MHZ (3 << 2) macro
H A DhalMVOP.c731 HAL_WriteByteMask(REG_CKG_DC0, CKG_DC0_108MHZ, CKG_DC0_MASK); in HAL_MVOP_SetFrequency()
/utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/
H A DregMVOP.h413 #define CKG_DC0_108MHZ (3 << 2) macro
H A DhalMVOP.c732 HAL_WriteByteMask(REG_CKG_DC0, CKG_DC0_108MHZ, CKG_DC0_MASK); in HAL_MVOP_SetFrequency()
/utopia/UTPA2-700.0.x/modules/pws/hal/messi/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/manhattan/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/
H A DregMVOP.h414 #define CKG_DC0_108MHZ (3 << 2) macro
H A DhalMVOP.c734 HAL_WriteByteMask(REG_CKG_DC0, CKG_DC0_108MHZ, CKG_DC0_MASK); in HAL_MVOP_SetFrequency()
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/
H A DregMVOP.h419 #define CKG_DC0_108MHZ (3 << 2) macro
H A DhalMVOP.c709 HAL_WriteByteMask(REG_CKG_DC0, CKG_DC0_108MHZ, CKG_DC0_MASK); in HAL_MVOP_SetFrequency()
/utopia/UTPA2-700.0.x/modules/pws/hal/k6lite/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6 << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/M7821/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mainz/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/mustang/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6 << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/maxim/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/M7621/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/curry/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6 << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/kano/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6 << 6) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/maserati/pws/
H A DregCLKGEN.h205 #define CKG_DC0_108MHZ (6UL << 6) macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/
H A DregMVOP.h482 #define CKG_DC0_108MHZ (3 << 2) macro
H A DhalMVOP.c714 HAL_WriteByteMask(REG_CKG_DC0, CKG_DC0_108MHZ, CKG_DC0_MASK); in HAL_MVOP_SetFrequency()