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Searched refs:BIT8 (Results 1 – 25 of 178) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/sys/hal/mooney/sys/
H A DhalSYS.c124 #define BIT8 (0x0100UL) macro
273 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
275 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
301 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
303 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
329 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
331 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
412 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10 | BIT9 | BIT8); in HAL_SYS_SetPadMux()
416 u16data |= BIT8; in HAL_SYS_SetPadMux()
458 …HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12 | BIT11 | BIT10 | BIT9 | BIT8)); in HAL_SYS_SetTSOutClockPhase()
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/messi/sys/
H A DhalSYS.c123 #define BIT8 (0x0100UL) macro
271 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
273 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
299 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
301 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
327 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
329 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
410 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10 | BIT9 | BIT8); in HAL_SYS_SetPadMux()
414 u16data |= BIT8; in HAL_SYS_SetPadMux()
429 u16data |= (BIT8|BIT9); in HAL_SYS_SetPadMux()
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/mainz/sys/
H A DhalSYS.c123 #define BIT8 (0x0100UL) macro
271 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
273 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
299 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
301 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
327 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
329 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
410 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10 | BIT9 | BIT8); in HAL_SYS_SetPadMux()
414 u16data |= BIT8; in HAL_SYS_SetPadMux()
429 u16data |= (BIT8|BIT9); in HAL_SYS_SetPadMux()
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/manhattan/sys/
H A DhalSYS.c142 #define BIT8 (0x0100UL) macro
327 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
329 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
355 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
357 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
383 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
385 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
466 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10|BIT9|BIT8); in HAL_SYS_SetPadMux()
470 u16data |= BIT8; in HAL_SYS_SetPadMux()
671 HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12|BIT11|BIT10|BIT9|BIT8)); in HAL_SYS_SetTSOutClockPhase()
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/macan/sys_closeSRC/
H A DhalSYS.c138 #define BIT8 (0x0100UL) macro
284 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
286 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
312 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
314 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
340 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
342 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
423 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10|BIT9|BIT8); in HAL_SYS_SetPadMux()
427 u16data |= BIT8; in HAL_SYS_SetPadMux()
628 HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12|BIT11|BIT10|BIT9|BIT8)); in HAL_SYS_SetTSOutClockPhase()
[all …]
/utopia/UTPA2-700.0.x/modules/pws/hal/k6lite/pws/
H A DregPWS.h112 #define BIT8 (0x0100) macro
155 #define CKG_VEDEC_CLK_DISABLE BIT8
171 #define CKG_SC1_IDCLK_F2_DISABLE BIT8
174 #define CKG_SC1_EDCLK_DISABLE BIT8
179 #define CKG_SC1_OD_CLK_DISABLE BIT8
183 #define CKG_HDGEN_FILTER_CLK_DISABLE BIT8
/utopia/UTPA2-700.0.x/modules/pws/hal/k6/pws/
H A DregPWS.h112 #define BIT8 (0x0100) macro
155 #define CKG_VEDEC_CLK_DISABLE BIT8
171 #define CKG_SC1_IDCLK_F2_DISABLE BIT8
174 #define CKG_SC1_EDCLK_DISABLE BIT8
179 #define CKG_SC1_OD_CLK_DISABLE BIT8
183 #define CKG_HDGEN_FILTER_CLK_DISABLE BIT8
/utopia/UTPA2-700.0.x/modules/sys/hal/maxim/sys/
H A DhalSYS.c142 #define BIT8 (0x0100UL) macro
327 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
329 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
355 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
357 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
383 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
385 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
466 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10|BIT9|BIT8); in HAL_SYS_SetPadMux()
470 u16data |= BIT8; in HAL_SYS_SetPadMux()
667 HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12|BIT11|BIT10|BIT9|BIT8)); in HAL_SYS_SetTSOutClockPhase()
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/M7621/sys/
H A DhalSYS.c142 #define BIT8 (0x0100UL) macro
327 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
329 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
355 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
357 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
383 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
385 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
466 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10|BIT9|BIT8); in HAL_SYS_SetPadMux()
470 u16data |= BIT8; in HAL_SYS_SetPadMux()
667 HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12|BIT11|BIT10|BIT9|BIT8)); in HAL_SYS_SetTSOutClockPhase()
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/M7821/sys/
H A DhalSYS.c142 #define BIT8 (0x0100UL) macro
327 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
329 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
355 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
357 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
383 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
385 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
466 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10|BIT9|BIT8); in HAL_SYS_SetPadMux()
470 u16data |= BIT8; in HAL_SYS_SetPadMux()
667 HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12|BIT11|BIT10|BIT9|BIT8)); in HAL_SYS_SetTSOutClockPhase()
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/maserati/sys/
H A DhalSYS.c142 #define BIT8 (0x0100UL) macro
327 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
329 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
355 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
357 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
383 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
385 HAL_SYS_Write2Byte(0x101E38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
466 u16data = HAL_SYS_Read2Byte(0x101EAE) & ~(BIT10|BIT9|BIT8); in HAL_SYS_SetPadMux()
470 u16data |= BIT8; in HAL_SYS_SetPadMux()
667 HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12|BIT11|BIT10|BIT9|BIT8)); in HAL_SYS_SetTSOutClockPhase()
[all …]
/utopia/UTPA2-700.0.x/modules/sys/hal/maldives/sys/
H A DhalSYS.c121 #define BIT8 (0x0100) macro
251 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
253 HAL_SYS_Write2Byte(0x101e38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
279 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
281 HAL_SYS_Write2Byte(0x101e38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
307 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
309 HAL_SYS_Write2Byte(0x101e38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
504 …HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12 | BIT11 | BIT10 | BIT9 | BIT8)); in HAL_SYS_SetTSOutClockPhase()
/utopia/UTPA2-700.0.x/modules/sys/hal/mustang/sys/
H A DhalSYS.c121 #define BIT8 (0x0100) macro
251 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_RFAGC_Tristate()
253 HAL_SYS_Write2Byte(0x101e38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_RFAGC_Tristate()
279 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_IFAGC_Tristate()
281 HAL_SYS_Write2Byte(0x101e38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_IFAGC_Tristate()
307 if((wReadRegisterData & (BIT9 | BIT8)) != 0) in HAL_SYS_SetAGCPadMux()
309 HAL_SYS_Write2Byte(0x101e38, (wReadRegisterData & ~(BIT9 | BIT8))); in HAL_SYS_SetAGCPadMux()
504 …HAL_SYS_Write2Byte(0x10330a, HAL_SYS_Read2Byte(0x10330a) & ~(BIT12 | BIT11 | BIT10 | BIT9 | BIT8)); in HAL_SYS_SetTSOutClockPhase()
/utopia/UTPA2-700.0.x/modules/pws/hal/curry/pws/
H A DregPWS.h112 #define BIT8 (0x0100) macro
155 #define CKG_VEDEC_CLK_DISABLE BIT8
166 #define CKG_SC1_IDCLK_F2_DISABLE BIT8
169 #define CKG_SC1_EDCLK_DISABLE BIT8
174 #define CKG_SC1_OD_CLK_DISABLE BIT8
/utopia/UTPA2-700.0.x/modules/ldm/hal/maserati/ldm/
H A DregLDM.h165 #define REG_DMA0_ENABLE_BIT BIT8
170 #define REG_DMA1_ENABLE_BIT BIT8
175 #define REG_DMA2_ENABLE_BIT BIT8
180 #define REG_DMA3_ENABLE_BIT BIT8
/utopia/UTPA2-700.0.x/modules/ldm/hal/M7621/ldm/
H A DregLDM.h165 #define REG_DMA0_ENABLE_BIT BIT8
170 #define REG_DMA1_ENABLE_BIT BIT8
175 #define REG_DMA2_ENABLE_BIT BIT8
180 #define REG_DMA3_ENABLE_BIT BIT8
/utopia/UTPA2-700.0.x/modules/ldm/hal/M7821/ldm/
H A DregLDM.h165 #define REG_DMA0_ENABLE_BIT BIT8
170 #define REG_DMA1_ENABLE_BIT BIT8
175 #define REG_DMA2_ENABLE_BIT BIT8
180 #define REG_DMA3_ENABLE_BIT BIT8
/utopia/UTPA2-700.0.x/modules/ldm/hal/maxim/ldm/
H A DregLDM.h165 #define REG_DMA0_ENABLE_BIT BIT8
170 #define REG_DMA1_ENABLE_BIT BIT8
175 #define REG_DMA2_ENABLE_BIT BIT8
180 #define REG_DMA3_ENABLE_BIT BIT8
/utopia/UTPA2-700.0.x/modules/gpio/hal/mooney/gpio/
H A DhalGPIO.c113 #define BIT8 BIT(8) macro
645 {0x10194b, BIT8},
/utopia/UTPA2-700.0.x/modules/gpio/hal/mainz/gpio/
H A DhalGPIO.c116 #define BIT8 BIT(8) macro
743 {0x10194b, BIT8},
/utopia/UTPA2-700.0.x/modules/gpio/hal/messi/gpio/
H A DhalGPIO.c116 #define BIT8 BIT(8) macro
723 {0x10194b, BIT8},
/utopia/UTPA2-700.0.x/modules/graphic/api/gfx/
H A D_apigfx_type.h128 #define BIT8 0x00000100 macro
/utopia/UTPA2-700.0.x/modules/pws/hal/maxim/pws/
H A DregPWS.h112 #define BIT8 (0x0100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/M7621/pws/
H A DregPWS.h112 #define BIT8 (0x0100UL) macro
/utopia/UTPA2-700.0.x/modules/pws/hal/macan/pws/
H A DregPWS.h112 #define BIT8 (0x0100UL) macro

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