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/rockchip-linux_mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu2_reg_tbl.h26 #define VEPU_REG_VP8_QUT_DC_Y2(x) (((x) & 0x3fff) << 16) argument
27 #define VEPU_REG_VP8_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) argument
29 #define VEPU_REG_VP8_QUT_AC_Y1(x) (((x) & 0x3fff) << 16) argument
30 #define VEPU_REG_VP8_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) argument
32 #define VEPU_REG_VP8_QUT_AC_CHR(x) (((x) & 0x3fff) << 16) argument
33 #define VEPU_REG_VP8_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) argument
35 #define VEPU_REG_VP8_QUT_ZB_DC_CHR(x) (((x) & 0x1ff) << 18) argument
36 #define VEPU_REG_VP8_QUT_ZB_DC_Y2(x) (((x) & 0x1ff) << 9) argument
37 #define VEPU_REG_VP8_QUT_ZB_DC_Y1(x) (((x) & 0x1ff) << 0) argument
39 #define VEPU_REG_VP8_QUT_ZB_AC_CHR(x) (((x) & 0x1ff) << 18) argument
[all …]
H A Dhal_h264e_vepu1_reg_tbl.h36 #define VEPU_REG_AXI_CTRL_WRITE_ID(x) (((x) & 0xff) << 24) argument
37 #define VEPU_REG_AXI_CTRL_READ_ID(x) (((x) & 0xff) << 16) argument
40 #define VEPU_REG_INPUT_SWAP16_(x) (((x) & 1) << 14) argument
41 #define VEPU_REG_AXI_CTRL_BURST_LEN(x) (((x) & 0x3f) << 8) argument
48 #define VEPU_REG_INPUT_SWAP32_(x) (((x) & 1) << 2) argument
51 #define VEPU_REG_INPUT_SWAP8_(x) ((x) & 1) argument
70 #define VEPU_REG_MB_WIDTH(x) (((x) & 0x1ff) << 19) argument
71 #define VEPU_REG_MB_HEIGHT(x) (((x) & 0x1ff) << 10) argument
73 #define VEPU_REG_PIC_TYPE(x) (((x) & 0x3) << 3) argument
74 #define VEPU_REG_ENCODE_FORMAT(x) (((x) & 0x3) << 1) argument
[all …]
/rockchip-linux_mpp/osal/inc/
H A Dmpp_common.h13 #define MPP_ABS(x) ((x) < (0) ? -(x) : (x)) argument
31 #define MPP_ALIGN(x, a) (((x)+(a)-1)&~((a)-1)) argument
32 #define MPP_ALIGN_DOWN(x, a) ((x)&~((a)-1)) argument
33 #define MPP_ALIGN_GEN(x, a) (((x)+(a)-1)/(a)*(a)) argument
38 #define MPP_RB16(x) ((((const RK_U8*)(x))[0] << 8) | ((const RK_U8*)(x))[1]) argument
43 #define MPP_RL16(x) ((((const RK_U8*)(x))[1] << 8) | \ argument
44 ((const RK_U8*)(x))[0])
49 #define MPP_RB32(x) ((((const RK_U8*)(x))[0] << 24) | \ argument
50 (((const RK_U8*)(x))[1] << 16) | \
51 (((const RK_U8*)(x))[2] << 8) | \
[all …]
H A Dmpp_singleton.h63 #define SNGL_TO_STR(x) #x argument
64 #define SNGL_TO_FUNC(x) __mpp_singleton_add_##x argument
H A Dmpp_debug.h74 #define MPP_STRINGS(x) MPP_TO_STRING(x) argument
75 #define MPP_TO_STRING(x) #x argument
H A Dmpp_time.h13 #define msleep(x) usleep((x)*1000) argument
/rockchip-linux_mpp/utils/
H A Dutils.c375 RK_U32 y = 0, x = 0; in calc_frm_crc() local
404 for (x = 0; x < width / 4; x++) in calc_frm_crc()
405 xor ^= dat32[x]; in calc_frm_crc()
427 for (x = 0; x < width / 4; x++) in calc_frm_crc()
428 xor ^= dat32[x]; in calc_frm_crc()
671 RK_U32 x, y; in fill_MPP_FMT_YUV420SP() local
674 for (x = 0; x < width; x++) { in fill_MPP_FMT_YUV420SP()
675 p[x] = x + y + frame_count * 3; in fill_MPP_FMT_YUV420SP()
681 for (x = 0; x < width / 2; x++) { in fill_MPP_FMT_YUV420SP()
682 p[x * 2 + 0] = 128 + y + frame_count * 2; in fill_MPP_FMT_YUV420SP()
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H A Dmpp_enc_roi_utils.c255 if (region->x + region->w > ctx->w || region->y + region->h > ctx->h) in gen_vepu54x_roi()
268 region->x, region->y, region->w, region->h, ctx->w, ctx->h); in gen_vepu54x_roi()
282 RK_S32 pos_x_init = (region->x + 15) / 16; in gen_vepu54x_roi()
286 RK_S32 x, y; in gen_vepu54x_roi() local
304 for (x = 0; x < roi_width; x++) { in gen_vepu54x_roi()
305 memcpy(p + x, &cfg, sizeof(cfg)); in gen_vepu54x_roi()
307 *(map + x) = 1; in gen_vepu54x_roi()
322 if (region->x < 64) { in gen_vepu54x_roi()
325 } else if (region->x % 64) { in gen_vepu54x_roi()
326 pos_x_init = (region->x - 64) / 64; in gen_vepu54x_roi()
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/rockchip-linux_mpp/mpp/codec/dec/vp8/
H A Dvp8d_data.h28 #define swap32bit(x) ((x>>24)|((x>>8)&0xff00)|((x<<8)&0xff0000)|(x<<24)) argument
/rockchip-linux_mpp/kmpp/base/inc/
H A Dkmpp_obj_macro.h17 #define _TO_STR(x) #x argument
18 #define TO_STR(x) _TO_STR(x) argument
65 #define KMPP_OBJ_DEF(x) CONCAT_US(x, def) argument
66 #define KMPP_OBJ_DEF_DEUBG(x) CONCAT_US(x, debug) argument
108 #define FLAG_BASE(x) ((0 & 0xff) | ((0 & 0xf) << 8) | (ELEM_FLAG_START << 12) | (0 << 16) | (0 … argument
109 #define FLAG_AT(x) ((x & 0xff) | ((0 & 0xf) << 8) | (ELEM_FLAG_OFFSET << 12) | (0 << 16) | (0 … argument
112 #define FLAG_REC(s, x) ((x & 0xff) | ((s & 0xf) << 8) | (ELEM_FLAG_OFFSET << 12) | (1 << 16) | (0 … argument
/rockchip-linux_mpp/mpp/codec/dec/avs2/
H A Davs2d_parse.c33 #define AVS2_ISPIC(x) ((x) == 0xB3 || (x) == 0xB6) argument
34 #define AVS2_ISUNIT(x) ((x) == 0xB0 || (x) == 0xB1 || (x) == 0xB2 || AVS2_ISPIC(x)) argument
35 #define AVS2_IS_START_CODE(x) (((x) & 0xffffff00) == 0x100) argument
37 #define AVS2_IS_SLICE_START_CODE(x) ((x) >= AVS2_SLICE_MIN_START_CODE && (x) <= AVS2_SLICE_MAX_STAR… argument
38 #define AVS2_IS_HEADER(x) ((x) >= AVS2_VIDEO_SEQUENCE_START_CODE && (x) <= AVS2_VIDEO_EDIT_CODE) argument
39 #define AVS2_IS_PIC_START_CODE(x) ((x) == AVS2_I_PICTURE_START_CODE || (x) == AVS2_PB_PICTURE_START… argument
H A Davs2d_global.h162 …CTURE_TYPE_TO_CHAR(x) ((x) == 0 ? 'I' : ((x) == 1 ? 'P' : ((x) == 2 ? 'B' : ((x) == 3 ? 'F' : ((x)… argument
/rockchip-linux_mpp/test/
H A Dmpi_rc2_test.c184 RK_U32 x, y; in mpi_rc_calc_psnr() local
201 for (x = 0; x < width; x++) { in mpi_rc_calc_psnr()
202 tmp = enc_buf_y[x + y * enc_hor_stride] - in mpi_rc_calc_psnr()
203 dec_buf_y[x + y * dec_hor_stride]; in mpi_rc_calc_psnr()
270 int x = 0; in ssim_4x4x2_core() local
277 for ( x = 0; x < 4; x++ ) { in ssim_4x4x2_core()
278 a = pix1[x + y * stride1]; in ssim_4x4x2_core()
279 b = pix2[x + y * stride2]; in ssim_4x4x2_core()
300 int x = 0; in calc_ssim() local
312 for ( x = 0; x < width; x += 2 ) in calc_ssim()
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H A Dmpp_parse_cfg.c13 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) argument
/rockchip-linux_mpp/inc/
H A Drk_type.h84 #define RK_UNUSED(x) ((void)((x))) argument
94 #define rk_unused(x) ((void)((x))) argument
/rockchip-linux_mpp/mpp/hal/rkenc/common/
H A Dvepu510_common.c41 if (region->x + region->w > w || region->y + region->h > h) in vepu510_set_roi()
57 region->x, region->y, region->w, region->h, w, in vepu510_set_roi()
65 reg_regions->roi_pos_lt.roi_lt_x = MPP_ALIGN(region->x, 16) >> 4; in vepu510_set_roi()
67 reg_regions->roi_pos_rb.roi_rb_x = MPP_ALIGN(region->x + region->w, 16) >> 4; in vepu510_set_roi()
H A Dvepu511_common.c124 if (region->x + region->w > w || region->y + region->h > h) in vepu511_set_roi()
138 region->x, region->y, region->w, region->h, w, h); in vepu511_set_roi()
146 reg_regions->roi_pos_lt.roi_lt_x = MPP_ALIGN(region->x, 16) >> 4; in vepu511_set_roi()
148 reg_regions->roi_pos_rb.roi_rb_x = MPP_ALIGN(region->x + region->w, 16) >> 4; in vepu511_set_roi()
H A Dvepu541_common.c53 RK_S32 pos_x_init = region->x / 16; in vepu541_set_one_roi()
57 RK_S32 x, y; in vepu541_set_one_roi() local
82 for (x = 0; x < roi_width; x++, dst++) in vepu541_set_one_roi()
132 if (region->x + region->w > w || region->y + region->h > h) in vepu541_set_roi()
146 region->x, region->y, region->w, region->h, w, h); in vepu541_set_roi()
H A Dvepu540c_common.c54 if (region->x + region->w > w || region->y + region->h > h) in vepu540c_set_roi()
70 region->x, region->y, region->w, region->h, w, in vepu540c_set_roi()
78 reg_regions->roi_pos_lt.roi_lt_x = MPP_ALIGN(region->x, 16) >> 4; in vepu540c_set_roi()
80 reg_regions->roi_pos_rb.roi_rb_x = MPP_ALIGN(region->x + region->w, 16) >> 4; in vepu540c_set_roi()
/rockchip-linux_mpp/mpp/vproc/iep2/
H A Diep2_roi.c32 ctx->params.xsta[idx] = r->x; in iep2_set_roi()
34 ctx->params.xend[idx] = r->x + r->w - 1; in iep2_set_roi()
H A Diep2_gmv.c106 int8_t x = map[i] - MVL; in iep2_update_gmv() local
109 iep2_is_subt_mv(x, mv_ls)) { in iep2_update_gmv()
112 ctx->params.mv_tru_list[i] = x; in iep2_update_gmv()
/rockchip-linux_mpp/mpp/codec/enc/h265/
H A Dh265e_enctropy.c27 #define CLZ32(id, x) id = (unsigned long)__builtin_clz(x) ^ 31 argument
29 #define CLZ32(id, x) _BitScanReverse(&id, x) argument
/rockchip-linux_mpp/mpp/hal/common/av1/
H A Dav1d_common.h517 #define ICDF(x) (32768U - (x)) argument
518 #define CDF_SIZE(x) ((x)-1) argument
520 #define AV1HWPAD(x, y) RK_U8 x[y] argument
/rockchip-linux_mpp/mpp/codec/dec/av1/
H A Dav1d_common.h536 #define ICDF(x) (32768U - (x)) argument
537 #define CDF_SIZE(x) ((x)-1) argument
539 #define AV1HWPAD(x, y) RK_U8 x[y] argument
/rockchip-linux_mpp/osal/linux/
H A Ddrm_mode.h135 __u32 x, y; /**< Position on the frameuffer */ member
431 __s32 x; member
442 __s32 x; member

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