Searched refs:tiles (Results 1 – 4 of 4) sorted by relevance
| /rockchip-linux_mpp/mpp/codec/dec/av1/ |
| H A D | av1d_parser2_syntax.c | 42 pp->tiles.cols = frame_header->tile_cols; in av1d_fill_picparams()
43 pp->tiles.rows = frame_header->tile_rows; in av1d_fill_picparams()
44 pp->tiles.context_update_id = frame_header->context_update_tile_id; in av1d_fill_picparams()
46 for (i = 0; i < pp->tiles.cols; i++) in av1d_fill_picparams()
47 pp->tiles.widths[i] = frame_header->width_in_sbs_minus_1[i] + 1; in av1d_fill_picparams()
49 for (i = 0; i < pp->tiles.rows; i++) in av1d_fill_picparams()
50 pp->tiles.heights[i] = frame_header->height_in_sbs_minus_1[i] + 1; in av1d_fill_picparams()
53 pp->tiles.tile_offset_start[i] = h->tile_offset_start[i]; in av1d_fill_picparams()
54 pp->tiles.tile_offset_end[i] = h->tile_offset_end[i]; in av1d_fill_picparams()
57 pp->tiles.tile_sz_mag = h->raw_frame_header->tile_size_bytes_minus1; in av1d_fill_picparams()
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| /rockchip-linux_mpp/mpp/hal/vpu/av1d/ |
| H A D | hal_av1d_vdpu.c | 1475 size_t context_update_tile_id = dxva->tiles.context_update_id; in vdpu_av1d_set_tile_info_regs()
1476 size_t context_update_y = context_update_tile_id / dxva->tiles.cols; in vdpu_av1d_set_tile_info_regs()
1477 size_t context_update_x = context_update_tile_id % dxva->tiles.cols; in vdpu_av1d_set_tile_info_regs()
1482 context_update_x * dxva->tiles.rows + context_update_y; in vdpu_av1d_set_tile_info_regs()
1484 regs->swreg10.sw_tile_enable = (dxva->tiles.cols > 1) || (dxva->tiles.rows > 1); in vdpu_av1d_set_tile_info_regs()
1485 regs->swreg10.sw_num_tile_cols_8k = dxva->tiles.cols; in vdpu_av1d_set_tile_info_regs()
1486 regs->swreg10.sw_num_tile_rows_8k_av1 = dxva->tiles.rows; in vdpu_av1d_set_tile_info_regs()
1489 regs->swreg11.sw_dec_tile_size_mag = dxva->tiles.tile_sz_mag; in vdpu_av1d_set_tile_info_regs()
1528 RK_S32 size0 = transpose ? dxva->tiles.cols : dxva->tiles.rows; in vdpu_av1d_set_tile_info_mem()
1529 RK_S32 size1 = transpose ? dxva->tiles.rows : dxva->tiles.cols; in vdpu_av1d_set_tile_info_mem()
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| /rockchip-linux_mpp/mpp/hal/rkdec/av1d/ |
| H A D | hal_av1d_vdpu383.c | 1767 mpp_put_bits(&bp, dxva->tiles.cols, 7); in prepare_uncompress_header()
1768 mpp_put_bits(&bp, dxva->tiles.rows, 7); in prepare_uncompress_header()
1769 mpp_put_bits(&bp, dxva->tiles.context_update_id, 12); in prepare_uncompress_header()
1770 mpp_put_bits(&bp, dxva->tiles.tile_sz_mag + 1, 3); in prepare_uncompress_header()
1771 mpp_put_bits(&bp, dxva->tiles.cols * dxva->tiles.rows, 13); in prepare_uncompress_header()
1775 mpp_put_bits(&bp, dxva->tiles.widths[i], 7); in prepare_uncompress_header()
1778 mpp_put_bits(&bp, dxva->tiles.heights[i], 10); in prepare_uncompress_header()
1859 RK_U32 tile_row_num = pic_param->tiles.rows; in av1d_refine_rcb_size()
1860 RK_U32 tile_col_num = pic_param->tiles.cols; in av1d_refine_rcb_size()
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| /rockchip-linux_mpp/mpp/common/ |
| H A D | av1d_syntax.h | 100 } tiles; member
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