Searched refs:tile_start_x (Results 1 – 4 of 4) sorted by relevance
| /rockchip-linux_mpp/mpp/codec/enc/h265/ |
| H A D | h265e_slice.c | 568 } else if ((tpely == 0) || (tpelx == cu->tile_start_x)) { in code_skip_flag()
807 RK_U32 offset_x = tile->tile_start_x; in h265e_code_skip_tile()
824 cu.tile_start_x = tile->tile_start_x; in h265e_code_skip_tile()
836 offset_x = tile->tile_start_x; in h265e_code_skip_tile()
874 tile.tile_start_x = 0; in h265e_code_slice_skip_frame()
878 tile.tile_end_x = tile.tile_start_x + in h265e_code_slice_skip_frame()
883 tile.tile_start_x += (pps->m_nTileColumnWidthArray[i] * sps->m_maxCUSize); in h265e_code_slice_skip_frame()
890 tile.tile_start_x = 0; in h265e_code_slice_skip_frame()
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| H A D | h265e_slice.h | 45 RK_U32 tile_start_x; member
51 RK_U32 tile_start_x; member
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| /rockchip-linux_mpp/mpp/hal/rkenc/h265e/ |
| H A D | hal_h265e_vepu541.c | 1327 RK_U32 index, RK_S32 tile_start_x) in vepu540_h265_set_me_ram() argument
1336 RK_S32 tile_ctu_stax = tile_start_x; in vepu540_h265_set_me_ram()
1337 RK_S32 tile_ctu_endx = tile_start_x + syn->pp.column_width_minus1[index]; in vepu540_h265_set_me_ram()
1638 RK_U32 index, RK_S32 tile_start_x) in hal_h265e_v540_set_uniform_tile() argument
1648 regs->tile_pos.tile_x = tile_start_x; in hal_h265e_v540_set_uniform_tile()
1673 RK_S32 tile_start_x = 0; in hal_h265e_v540_start() local
1688 vepu540_h265_set_me_ram(syn, hw_regs, k, tile_start_x); in hal_h265e_v540_start()
1694 hal_h265e_v540_set_uniform_tile(hw_regs, syn, k, tile_start_x); in hal_h265e_v540_start()
1765 tile_start_x += (syn->pp.column_width_minus1[k] + 1); in hal_h265e_v540_start()
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| H A D | hal_h265e_vepu580.c | 261 RK_U32 index, RK_S32 tile_start_x) in vepu580_h265_set_me_ram() argument
284 RK_S32 tile_ctu_stax = tile_start_x; in vepu580_h265_set_me_ram()
285 RK_S32 tile_ctu_endx = tile_start_x + syn->pp.column_width_minus1[index]; in vepu580_h265_set_me_ram()
2811 RK_U32 index, RK_S32 tile_start_x) in hal_h265e_v580_set_uniform_tile() argument
2848 regs->reg0253_tile_pos.tile_x = tile_start_x; in hal_h265e_v580_set_uniform_tile()
2867 RK_S32 tile_start_x = 0; in hal_h265e_v580_start() local
2903 vepu580_h265_set_me_ram(syn, reg_base, k, tile_start_x); in hal_h265e_v580_start()
2908 hal_h265e_v580_set_uniform_tile(reg_base, syn, k, tile_start_x); in hal_h265e_v580_start()
2977 tile_start_x += (syn->pp.column_width_minus1[k] + 1); in hal_h265e_v580_start()
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