Searched refs:src_udfu (Results 1 – 14 of 14) sorted by relevance
270 regs->src_udfu.csc_wgt_r2u = -38; in vepu511_set_jpeg_reg()271 regs->src_udfu.csc_wgt_g2u = -74; in vepu511_set_jpeg_reg()272 regs->src_udfu.csc_wgt_b2u = 112; in vepu511_set_jpeg_reg()
116 } src_udfu; member
496 regs->reg_base.src_udfu.csc_wgt_b2u = cfg_coeffs->_2u.b_coeff; in setup_vepu540c_prep()497 regs->reg_base.src_udfu.csc_wgt_g2u = cfg_coeffs->_2u.g_coeff; in setup_vepu540c_prep()498 regs->reg_base.src_udfu.csc_wgt_r2u = cfg_coeffs->_2u.r_coeff; in setup_vepu540c_prep()514 regs->reg_base.src_udfu.csc_wgt_b2u = cfg.weight[3]; in setup_vepu540c_prep()515 regs->reg_base.src_udfu.csc_wgt_g2u = cfg.weight[4]; in setup_vepu540c_prep()516 regs->reg_base.src_udfu.csc_wgt_r2u = cfg.weight[5]; in setup_vepu540c_prep()
777 regs->reg_base.src_udfu.csc_wgt_b2u = cfg_coeffs->_2u.b_coeff; in setup_vepu580_prep()778 regs->reg_base.src_udfu.csc_wgt_g2u = cfg_coeffs->_2u.g_coeff; in setup_vepu580_prep()779 regs->reg_base.src_udfu.csc_wgt_r2u = cfg_coeffs->_2u.r_coeff; in setup_vepu580_prep()795 regs->reg_base.src_udfu.csc_wgt_b2u = cfg.weight[3]; in setup_vepu580_prep()796 regs->reg_base.src_udfu.csc_wgt_g2u = cfg.weight[4]; in setup_vepu580_prep()797 regs->reg_base.src_udfu.csc_wgt_r2u = cfg.weight[5]; in setup_vepu580_prep()
793 reg_frm->common.src_udfu.csc_wgt_b2u = cfg_coeffs->_2u.b_coeff; in setup_vepu510_prep()794 reg_frm->common.src_udfu.csc_wgt_g2u = cfg_coeffs->_2u.g_coeff; in setup_vepu510_prep()795 reg_frm->common.src_udfu.csc_wgt_r2u = cfg_coeffs->_2u.r_coeff; in setup_vepu510_prep()811 reg_frm->common.src_udfu.csc_wgt_b2u = cfg.weight[3]; in setup_vepu510_prep()812 reg_frm->common.src_udfu.csc_wgt_g2u = cfg.weight[4]; in setup_vepu510_prep()813 reg_frm->common.src_udfu.csc_wgt_r2u = cfg.weight[5]; in setup_vepu510_prep()
770 reg_frm->common.src_udfu.csc_wgt_b2u = cfg_coeffs->_2u.b_coeff; in setup_vepu511_prep()771 reg_frm->common.src_udfu.csc_wgt_g2u = cfg_coeffs->_2u.g_coeff; in setup_vepu511_prep()772 reg_frm->common.src_udfu.csc_wgt_r2u = cfg_coeffs->_2u.r_coeff; in setup_vepu511_prep()788 reg_frm->common.src_udfu.csc_wgt_b2u = cfg.weight[3]; in setup_vepu511_prep()789 reg_frm->common.src_udfu.csc_wgt_g2u = cfg.weight[4]; in setup_vepu511_prep()790 reg_frm->common.src_udfu.csc_wgt_r2u = cfg.weight[5]; in setup_vepu511_prep()
420 } src_udfu; member
395 } src_udfu; member
210 } src_udfu; member
1111 regs->src_udfu.wght_r2u = cfg_coeffs->_2u.r_coeff; in vepu541_h265_set_pp_regs()1112 regs->src_udfu.wght_g2u = cfg_coeffs->_2u.g_coeff; in vepu541_h265_set_pp_regs()1113 regs->src_udfu.wght_b2u = cfg_coeffs->_2u.b_coeff; in vepu541_h265_set_pp_regs()
1479 reg_frm->common.src_udfu.csc_wgt_r2u = cfg_coeffs->_2u.r_coeff; in vepu510_h265_set_pp_regs()1480 reg_frm->common.src_udfu.csc_wgt_g2u = cfg_coeffs->_2u.g_coeff; in vepu510_h265_set_pp_regs()1481 reg_frm->common.src_udfu.csc_wgt_b2u = cfg_coeffs->_2u.b_coeff; in vepu510_h265_set_pp_regs()
1202 reg_frm->common.src_udfu.csc_wgt_r2u = -43; in vepu511_h265_set_pp_regs()1203 reg_frm->common.src_udfu.csc_wgt_g2u = -85; in vepu511_h265_set_pp_regs()1204 reg_frm->common.src_udfu.csc_wgt_b2u = 128; in vepu511_h265_set_pp_regs()
581 } src_udfu; member
910 } src_udfu; member