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Searched refs:reg_idx (Results 1 – 25 of 28) sorted by relevance

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/rockchip-linux_mpp/mpp/hal/vpu/jpege/
H A Dhal_jpege_vepu2_v2.c177 task->flags.reg_idx = 0; in hal_jpege_vepu2_get_task()
181 task->flags.reg_idx = ctx->task_idx++; in hal_jpege_vepu2_get_task()
379 RK_S32 reg_idx = task->flags.reg_idx; in hal_jpege_vepu2_gen_regs() local
380 RK_U32 *regs = (RK_U32 *)((RK_U8 *)ctx->regs + ctx->reg_size * reg_idx); in hal_jpege_vepu2_gen_regs()
586 RK_S32 reg_idx = task->flags.reg_idx; in multi_core_start() local
587 RK_U32 *src = (RK_U32 *)((RK_U8 *)ctx->regs + ctx->reg_size * reg_idx); in multi_core_start()
817 RK_S32 reg_idx = task->flags.reg_idx; in hal_jpege_vepu2_start() local
818 RK_U32 *regs = (RK_U32 *)((RK_U8 *)ctx->regs + reg_size * reg_idx); in hal_jpege_vepu2_start()
865 RK_S32 reg_idx = task->flags.reg_idx; in hal_jpege_vepu2_wait() local
866 RK_U32 *regs = (RK_U32 *)((RK_U8 *)ctx->regs + ctx->reg_size * reg_idx); in hal_jpege_vepu2_wait()
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/rockchip-linux_mpp/mpp/hal/rkdec/
H A Dvdpu383_com.c32 static RK_S32 update_size_offset(Vdpu383RcbInfo *info, RK_U32 reg_idx, in update_size_offset() argument
38 info[idx].reg_idx = reg_idx; in update_size_offset()
95 mpp_dev_set_reg_offset(dev, info[i].reg_idx, info[i].offset); in vdpu383_setup_rcb()
183 rcb_cfg.reg_idx = info[i].reg_idx; in vdpu383_set_rcbinfo()
198 rcb_cfg.reg_idx = info[index].reg_idx; in vdpu383_set_rcbinfo()
H A Dvdpu384a_com.c33 static RK_S32 update_size_offset(Vdpu384aRcbInfo *info, RK_U32 reg_idx, in update_size_offset() argument
39 info[idx].reg_idx = reg_idx; in update_size_offset()
107 mpp_dev_set_reg_offset(dev, info[i].reg_idx, info[i].offset); in vdpu384a_setup_rcb()
195 rcb_cfg.reg_idx = info[i].reg_idx; in vdpu384a_set_rcbinfo()
210 rcb_cfg.reg_idx = info[index].reg_idx; in vdpu384a_set_rcbinfo()
H A Dvdpu34x_com.c151 rcb_cfg.reg_idx = info[i].reg; in vdpu34x_set_rcbinfo()
174 rcb_cfg.reg_idx = info[index].reg; in vdpu34x_set_rcbinfo()
H A Dvdpu382_com.c154 rcb_cfg.reg_idx = info[i].reg; in vdpu382_set_rcbinfo()
169 rcb_cfg.reg_idx = info[index].reg; in vdpu382_set_rcbinfo()
/rockchip-linux_mpp/osal/driver/inc/
H A Dmpp_service_impl.h19 RK_U32 reg_idx; member
24 RK_U32 reg_idx; member
/rockchip-linux_mpp/osal/driver/
H A Dmpp_service.c536 if (info->reg_idx == cfg->reg_idx) { in mpp_service_reg_offset()
538 info->reg_idx, info->offset, cfg->offset); in mpp_service_reg_offset()
545 info->reg_idx = cfg->reg_idx; in mpp_service_reg_offset()
573 if (info->reg_idx == cfg->reg_idx) { in mpp_service_reg_offsets()
575 info->reg_idx, info->offset, cfg->offset); in mpp_service_reg_offsets()
582 info->reg_idx = cfg->reg_idx; in mpp_service_reg_offsets()
603 info->reg_idx = cfg->reg_idx; in mpp_service_rcb_info()
H A Dvcodec_service.c38 RK_U32 reg_idx; member
443 reg[slot->reg_idx] |= (slot->offset << 10); in update_extra_info()
623 if (slot->reg_idx == cfg->reg_idx) { in vcodec_service_reg_offset()
625 slot->reg_idx, slot->offset, cfg->offset); in vcodec_service_reg_offset()
632 slot->reg_idx = cfg->reg_idx; in vcodec_service_reg_offset()
H A Dmpp_device.c194 trans_cfg.reg_idx = index; in mpp_dev_set_reg_offset()
256 if (cfg->reg_idx == (RK_U32)index) { in mpp_dev_multi_offset_update()
262 cfg->reg_idx = index; in mpp_dev_multi_offset_update()
/rockchip-linux_mpp/osal/inc/
H A Dmpp_device.h62 RK_U32 reg_idx; member
75 RK_U32 reg_idx; member
/rockchip-linux_mpp/mpp/hal/inc/
H A Dhal_enc_task.h37 RK_S32 reg_idx; member
/rockchip-linux_mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu510_tune.c139 HalVepu510RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in vepu510_h264e_tune_stat_update()
H A Dhal_h264e_vepu511.c575 task->flags.reg_idx = ctx->task_idx; in hal_h264e_vepu511_get_task()
1760 rcb_cfg.reg_idx = 179; in setup_vepu511_ext_line_buf()
1765 rcb_cfg.reg_idx = 178; in setup_vepu511_ext_line_buf()
2354 HalVepu511RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in hal_h264e_vepu511_wait()
2376 task->flags.reg_idx * ctx->poll_cfg_size); in hal_h264e_vepu511_wait()
2426 HalH264eVepuStreamAmend *amend = &ctx->amend_sets[task->flags.reg_idx]; in hal_h264e_vepu511_wait()
2447 HalVepu511RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in vepu511_h264e_update_tune_stat()
2543 HalVepu511RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in hal_h264e_vepu511_ret_task()
H A Dhal_h264e_vepu580.c594 task->flags.reg_idx = ctx->task_idx; in hal_h264e_vepu580_get_task()
2074 rcb_cfg.reg_idx = 183; in setup_vepu580_ext_line_buf()
2079 rcb_cfg.reg_idx = 182; in setup_vepu580_ext_line_buf()
2365 HalVepu580RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in hal_h264e_vepu580_wait()
2387 task->flags.reg_idx * ctx->poll_cfg_size); in hal_h264e_vepu580_wait()
2437 HalH264eVepuStreamAmend *amend = &ctx->amend_sets[task->flags.reg_idx]; in hal_h264e_vepu580_wait()
2459 HalVepu580RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in hal_h264e_vepu580_ret_task()
H A Dhal_h264e_vepu510.c576 task->flags.reg_idx = ctx->task_idx; in hal_h264e_vepu510_get_task()
1768 rcb_cfg.reg_idx = 179; in setup_vepu510_ext_line_buf()
1773 rcb_cfg.reg_idx = 178; in setup_vepu510_ext_line_buf()
2393 HalVepu510RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in hal_h264e_vepu510_wait()
2415 task->flags.reg_idx * ctx->poll_cfg_size); in hal_h264e_vepu510_wait()
2465 HalH264eVepuStreamAmend *amend = &ctx->amend_sets[task->flags.reg_idx]; in hal_h264e_vepu510_wait()
2487 HalVepu510RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in hal_h264e_vepu510_ret_task()
H A Dhal_h264e_vepu580_tune.c248 HalVepu580RegSet *regs = &ctx->regs_sets[task->flags.reg_idx]; in vepu580_h264e_tune_stat_update()
/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp.c384 reg_off[0].reg_idx = 25; in vdpp_start()
386 reg_off[1].reg_idx = 27; in vdpp_start()
/rockchip-linux_mpp/mpp/legacy/
H A Dvpu.c42 RK_U32 reg_idx; member
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu510.c60 RK_S32 reg_idx; member
1772 rcb_cfg.reg_idx = 179; in setup_vepu510_ext_line_buf()
1777 rcb_cfg.reg_idx = 178; in setup_vepu510_ext_line_buf()
2224 Vepu510H265eFrmCfg *frm = ctx->frms[enc_task->flags.reg_idx]; in vepu510_h265_set_feedback()
2344 RK_S32 task_idx = task->flags.reg_idx; in hal_h265e_v510_wait()
2521 task->flags.reg_idx = ctx->task_idx; in hal_h265e_v510_get_task()
2545 RK_S32 task_idx = task->flags.reg_idx; in hal_h265e_v510_ret_task()
H A Dhal_h265e_vepu511.c61 RK_S32 reg_idx; member
265 RK_U32 frm_num = ctx->frms[enc_task->flags.reg_idx]->frame_count; in vepu511_h265e_dump()
2416 Vepu511H265eFrmCfg *frm = ctx->frms[enc_task->flags.reg_idx]; in vepu511_h265_set_feedback()
2531 RK_S32 task_idx = task->flags.reg_idx; in vepu511_h265e_update_tune_stat()
2636 RK_S32 task_idx = task->flags.reg_idx; in hal_h265e_vepu511_wait()
2759 task->flags.reg_idx = ctx->task_idx; in hal_h265e_vepu511_get_task()
2783 RK_S32 task_idx = task->flags.reg_idx; in hal_h265e_vepu511_ret_task()
H A Dhal_h265e_vepu510_tune.c240 RK_S32 task_idx = task->flags.reg_idx; in vepu510_h265e_tune_stat_update()
H A Dhal_h265e_vepu541_reg.h888 RK_U32 reg_idx; member
/rockchip-linux_mpp/mpp/hal/rkdec/inc/
H A Dvdpu383_com.h636 RK_U32 reg_idx; member
H A Dvdpu384a_com.h662 RK_U32 reg_idx; member
/rockchip-linux_mpp/mpp/hal/rkdec/av1d/
H A Dhal_av1d_vdpu383.c1785 static RK_S32 update_size_offset(Vdpu383RcbInfo *info, RK_U32 reg_idx, in update_size_offset() argument
1791 info[rcb_buf_idx].reg_idx = reg_idx; in update_size_offset()
1986 …mpp_dev_set_reg_offset(p_hal->dev, reg_ctx->rcb_buf_info[i].reg_idx, reg_ctx->rcb_buf_info[i].offs… in vdpu383_av1d_rcb_reg_cfg()

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