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Searched refs:reg8 (Results 1 – 10 of 10) sorted by relevance

/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp.c58 dst_reg->common.reg8.sw_vdpp_frm_done_en = 1; in vdpp_params_to_reg()
59 dst_reg->common.reg8.sw_vdpp_osd_max_en = 1; in vdpp_params_to_reg()
60 dst_reg->common.reg8.sw_vdpp_bus_error_en = 1; in vdpp_params_to_reg()
61 dst_reg->common.reg8.sw_vdpp_timeout_int_en = 1; in vdpp_params_to_reg()
62 dst_reg->common.reg8.sw_vdpp_config_error_en = 1; in vdpp_params_to_reg()
460 if (reg->common.reg8.sw_vdpp_frm_done_en && in vdpp_done()
H A Dvdpp_common.c715 dmsr->reg8.sw_dmsr_edge_k_2 = adj_mapping_k[2]; in set_dmsr_to_vdpp_reg()
716 dmsr->reg8.sw_dmsr_edge_k_3 = adj_mapping_k[3]; in set_dmsr_to_vdpp_reg()
877 zme->common.reg8.yrgb_xscl_factor = yrgb_scl_info.xscl_factor; in set_zme_to_vdpp_reg()
878 zme->common.reg8.yrgb_xscl_offset = yrgb_scl_info.xscl_offset; in set_zme_to_vdpp_reg()
H A Dvdpp_reg.h78 } reg8; // 0x0020 member
H A Dvdpp_common.h108 } reg8; /* 0x00A0 */ member
303 } reg8; /* 0x0020 */ member
647 } reg8; /* 0x0220 */ member
991 } reg8; /* 0x0420 */ member
1335 } reg8; /* 0x0620 */ member
1694 } reg8; /* 0x0820 */ member
H A Dvdpp2.c460 dst_reg->es.reg8.lut_x5 = p_es_param->es_iDiff2conf_lut_x[5]; in set_es_to_vdpp2_reg()
461 dst_reg->es.reg8.lut_x6 = p_es_param->es_iDiff2conf_lut_x[6]; in set_es_to_vdpp2_reg()
830 dst_reg->sharp.reg8.sw_peaking_h20 = p_shp_param->peaking_filt_core_H2[0]; in set_shp_to_vdpp2_reg()
831 dst_reg->sharp.reg8.sw_peaking_h21 = p_shp_param->peaking_filt_core_H2[1]; in set_shp_to_vdpp2_reg()
832 dst_reg->sharp.reg8.sw_peaking_h22 = p_shp_param->peaking_filt_core_H2[2]; in set_shp_to_vdpp2_reg()
1120 dst_reg->common.reg8.sw_vdpp_frm_done_en = 1; in vdpp2_params_to_reg()
1121 dst_reg->common.reg8.sw_vdpp_osd_max_en = 1; in vdpp2_params_to_reg()
1122 dst_reg->common.reg8.sw_vdpp_bus_error_en = 1; in vdpp2_params_to_reg()
1123 dst_reg->common.reg8.sw_vdpp_timeout_int_en = 1; in vdpp2_params_to_reg()
1124 dst_reg->common.reg8.sw_vdpp_config_error_en = 1; in vdpp2_params_to_reg()
[all …]
H A Dvdpp2_reg.h99 } reg8; // 0x0020 member
281 } reg8; // 0x0120 member
457 } reg8; // 0x0220 member
/rockchip-linux_mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_vdpu1_reg.h146 } reg8; member
/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu1_reg.h358 } reg8; member
H A Dhal_jpegd_vdpu2_reg.h74 RK_U32 reg8; member
H A Dhal_jpegd_vdpu1.c720 reg->reg8.sw_pjpeg_rest_freq = s->restart_interval; in jpegd_gen_regs()