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Searched refs:reg29 (Results 1 – 12 of 12) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkdec/
H A Dvdpu383_com.c116 ctrl_regs->reg29.addr_align_type = 1; in vdpu383_setup_statistic()
117 ctrl_regs->reg29.ar_cnt_id_type = 0; in vdpu383_setup_statistic()
118 ctrl_regs->reg29.aw_cnt_id_type = 1; in vdpu383_setup_statistic()
119 ctrl_regs->reg29.ar_count_id = 17; in vdpu383_setup_statistic()
120 ctrl_regs->reg29.aw_count_id = 0; in vdpu383_setup_statistic()
121 ctrl_regs->reg29.rd_band_width_mode = 0; in vdpu383_setup_statistic()
H A Dvdpu384a_com.c128 ctrl_regs->reg29.addr_align_type = 1; in vdpu384a_setup_statistic()
129 ctrl_regs->reg29.ar_cnt_id_type = 0; in vdpu384a_setup_statistic()
130 ctrl_regs->reg29.aw_cnt_id_type = 1; in vdpu384a_setup_statistic()
131 ctrl_regs->reg29.ar_count_id = 17; in vdpu384a_setup_statistic()
132 ctrl_regs->reg29.aw_count_id = 0; in vdpu384a_setup_statistic()
133 ctrl_regs->reg29.rd_band_width_mode = 0; in vdpu384a_setup_statistic()
/rockchip-linux_mpp/mpp/hal/rkdec/avs2d/
H A Dhal_avs2d_vdpu383.c269 ctrl_regs->reg29.addr_align_type = 2; in init_ctrl_regs()
270 ctrl_regs->reg29.ar_cnt_id_type = 0; in init_ctrl_regs()
271 ctrl_regs->reg29.aw_cnt_id_type = 0; in init_ctrl_regs()
272 ctrl_regs->reg29.ar_count_id = 0xa; in init_ctrl_regs()
273 ctrl_regs->reg29.aw_count_id = 0; in init_ctrl_regs()
274 ctrl_regs->reg29.rd_band_width_mode = 0; in init_ctrl_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu384a.c577 ctrl_regs->reg29.addr_align_type = 2; in init_ctrl_regs()
578 ctrl_regs->reg29.ar_cnt_id_type = 0; in init_ctrl_regs()
579 ctrl_regs->reg29.aw_cnt_id_type = 0; in init_ctrl_regs()
580 ctrl_regs->reg29.ar_count_id = 0xa; in init_ctrl_regs()
581 ctrl_regs->reg29.aw_count_id = 0; in init_ctrl_regs()
582 ctrl_regs->reg29.rd_band_width_mode = 0; in init_ctrl_regs()
H A Dhal_h264d_vdpu383.c619 ctrl_regs->reg29.addr_align_type = 2; in init_ctrl_regs()
620 ctrl_regs->reg29.ar_cnt_id_type = 0; in init_ctrl_regs()
621 ctrl_regs->reg29.aw_cnt_id_type = 0; in init_ctrl_regs()
622 ctrl_regs->reg29.ar_count_id = 0xa; in init_ctrl_regs()
623 ctrl_regs->reg29.aw_count_id = 0; in init_ctrl_regs()
624 ctrl_regs->reg29.rd_band_width_mode = 0; in init_ctrl_regs()
/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp_common.h408 } reg29; /* 0x0074 */ member
752 } reg29; /* 0x0274 */ member
1096 } reg29; /* 0x0474 */ member
1440 } reg29; /* 0x0674 */ member
H A Dvdpp2_reg.h358 } reg29; // 0x0174 member
562 } reg29; // 0x0274 member
H A Dvdpp2.c697 dst_reg->sharp.reg29.sw_peaking1_value_p2 = peaking_ctrl_value_P2[1]; in set_shp_to_vdpp2_reg()
698 dst_reg->sharp.reg29.sw_peaking1_value_p3 = peaking_ctrl_value_P3[1]; in set_shp_to_vdpp2_reg()
/rockchip-linux_mpp/mpp/hal/rkdec/av1d/
H A Dhal_av1d_vdpu383.c2262 regs->ctrl_regs.reg29.addr_align_type = 1; in vdpu383_av1d_gen_regs()
2263 regs->ctrl_regs.reg29.ar_cnt_id_type = 0; in vdpu383_av1d_gen_regs()
2264 regs->ctrl_regs.reg29.aw_cnt_id_type = 1; in vdpu383_av1d_gen_regs()
2265 regs->ctrl_regs.reg29.ar_count_id = 17; in vdpu383_av1d_gen_regs()
2266 regs->ctrl_regs.reg29.aw_count_id = 0; in vdpu383_av1d_gen_regs()
2267 regs->ctrl_regs.reg29.rd_band_width_mode = 0; in vdpu383_av1d_gen_regs()
/rockchip-linux_mpp/mpp/hal/rkdec/inc/
H A Dvdpu383_com.h204 } reg29; member
H A Dvdpu384a_com.h222 } reg29; member
/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu2_reg.h119 RK_U32 reg29; member