Home
last modified time | relevance | path

Searched refs:rcb_cfg (Results 1 – 8 of 8) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkdec/
H A Dvdpu34x_com.c122 MppDevRcbInfoCfg rcb_cfg; in vdpu34x_set_rcbinfo() local
151 rcb_cfg.reg_idx = info[i].reg; in vdpu34x_set_rcbinfo()
152 rcb_cfg.size = info[i].size; in vdpu34x_set_rcbinfo()
153 if (rcb_cfg.size > 0) { in vdpu34x_set_rcbinfo()
154 mpp_dev_ioctl(dev, MPP_DEV_RCB_INFO, &rcb_cfg); in vdpu34x_set_rcbinfo()
174 rcb_cfg.reg_idx = info[index].reg; in vdpu34x_set_rcbinfo()
175 rcb_cfg.size = info[index].size; in vdpu34x_set_rcbinfo()
176 if (rcb_cfg.size > 0) { in vdpu34x_set_rcbinfo()
177 mpp_dev_ioctl(dev, MPP_DEV_RCB_INFO, &rcb_cfg); in vdpu34x_set_rcbinfo()
H A Dvdpu382_com.c125 MppDevRcbInfoCfg rcb_cfg; in vdpu382_set_rcbinfo() local
154 rcb_cfg.reg_idx = info[i].reg; in vdpu382_set_rcbinfo()
155 rcb_cfg.size = info[i].size; in vdpu382_set_rcbinfo()
156 if (rcb_cfg.size > 0) { in vdpu382_set_rcbinfo()
157 mpp_dev_ioctl(dev, MPP_DEV_RCB_INFO, &rcb_cfg); in vdpu382_set_rcbinfo()
169 rcb_cfg.reg_idx = info[index].reg; in vdpu382_set_rcbinfo()
170 rcb_cfg.size = info[index].size; in vdpu382_set_rcbinfo()
171 if (rcb_cfg.size > 0) { in vdpu382_set_rcbinfo()
172 mpp_dev_ioctl(dev, MPP_DEV_RCB_INFO, &rcb_cfg); in vdpu382_set_rcbinfo()
H A Dvdpu383_com.c151 MppDevRcbInfoCfg rcb_cfg; in vdpu383_set_rcbinfo() local
183 rcb_cfg.reg_idx = info[i].reg_idx; in vdpu383_set_rcbinfo()
184 rcb_cfg.size = info[i].size; in vdpu383_set_rcbinfo()
185 if (rcb_cfg.size > 0) { in vdpu383_set_rcbinfo()
186 mpp_dev_ioctl(dev, MPP_DEV_RCB_INFO, &rcb_cfg); in vdpu383_set_rcbinfo()
198 rcb_cfg.reg_idx = info[index].reg_idx; in vdpu383_set_rcbinfo()
199 rcb_cfg.size = info[index].size; in vdpu383_set_rcbinfo()
200 if (rcb_cfg.size > 0) { in vdpu383_set_rcbinfo()
201 mpp_dev_ioctl(dev, MPP_DEV_RCB_INFO, &rcb_cfg); in vdpu383_set_rcbinfo()
H A Dvdpu384a_com.c163 MppDevRcbInfoCfg rcb_cfg; in vdpu384a_set_rcbinfo() local
195 rcb_cfg.reg_idx = info[i].reg_idx; in vdpu384a_set_rcbinfo()
196 rcb_cfg.size = info[i].size; in vdpu384a_set_rcbinfo()
197 if (rcb_cfg.size > 0) { in vdpu384a_set_rcbinfo()
198 mpp_dev_ioctl(dev, MPP_DEV_RCB_INFO, &rcb_cfg); in vdpu384a_set_rcbinfo()
210 rcb_cfg.reg_idx = info[index].reg_idx; in vdpu384a_set_rcbinfo()
211 rcb_cfg.size = info[index].size; in vdpu384a_set_rcbinfo()
212 if (rcb_cfg.size > 0) { in vdpu384a_set_rcbinfo()
213 mpp_dev_ioctl(dev, MPP_DEV_RCB_INFO, &rcb_cfg); in vdpu384a_set_rcbinfo()
/rockchip-linux_mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu580.c2072 MppDevRcbInfoCfg rcb_cfg; in setup_vepu580_ext_line_buf() local
2074 rcb_cfg.reg_idx = 183; in setup_vepu580_ext_line_buf()
2075 rcb_cfg.size = offset; in setup_vepu580_ext_line_buf()
2077 mpp_dev_ioctl(ctx->dev, MPP_DEV_RCB_INFO, &rcb_cfg); in setup_vepu580_ext_line_buf()
2079 rcb_cfg.reg_idx = 182; in setup_vepu580_ext_line_buf()
2080 rcb_cfg.size = 0; in setup_vepu580_ext_line_buf()
2082 mpp_dev_ioctl(ctx->dev, MPP_DEV_RCB_INFO, &rcb_cfg); in setup_vepu580_ext_line_buf()
H A Dhal_h264e_vepu510.c1749 MppDevRcbInfoCfg rcb_cfg; in setup_vepu510_ext_line_buf() local
1768 rcb_cfg.reg_idx = 179; in setup_vepu510_ext_line_buf()
1769 rcb_cfg.size = offset; in setup_vepu510_ext_line_buf()
1771 mpp_dev_ioctl(ctx->dev, MPP_DEV_RCB_INFO, &rcb_cfg); in setup_vepu510_ext_line_buf()
1773 rcb_cfg.reg_idx = 178; in setup_vepu510_ext_line_buf()
1774 rcb_cfg.size = 0; in setup_vepu510_ext_line_buf()
1776 mpp_dev_ioctl(ctx->dev, MPP_DEV_RCB_INFO, &rcb_cfg); in setup_vepu510_ext_line_buf()
H A Dhal_h264e_vepu511.c1741 MppDevRcbInfoCfg rcb_cfg; in setup_vepu511_ext_line_buf() local
1760 rcb_cfg.reg_idx = 179; in setup_vepu511_ext_line_buf()
1761 rcb_cfg.size = offset; in setup_vepu511_ext_line_buf()
1763 mpp_dev_ioctl(ctx->dev, MPP_DEV_RCB_INFO, &rcb_cfg); in setup_vepu511_ext_line_buf()
1765 rcb_cfg.reg_idx = 178; in setup_vepu511_ext_line_buf()
1766 rcb_cfg.size = 0; in setup_vepu511_ext_line_buf()
1768 mpp_dev_ioctl(ctx->dev, MPP_DEV_RCB_INFO, &rcb_cfg); in setup_vepu511_ext_line_buf()
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu510.c1754 MppDevRcbInfoCfg rcb_cfg; in setup_vepu510_ext_line_buf() local
1772 rcb_cfg.reg_idx = 179; in setup_vepu510_ext_line_buf()
1773 rcb_cfg.size = offset; in setup_vepu510_ext_line_buf()
1775 mpp_dev_ioctl(ctx->dev, MPP_DEV_RCB_INFO, &rcb_cfg); in setup_vepu510_ext_line_buf()
1777 rcb_cfg.reg_idx = 178; in setup_vepu510_ext_line_buf()
1778 rcb_cfg.size = 0; in setup_vepu510_ext_line_buf()
1780 mpp_dev_ioctl(ctx->dev, MPP_DEV_RCB_INFO, &rcb_cfg); in setup_vepu510_ext_line_buf()