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Searched refs:num_tile_columns_minus1 (Results 1 – 11 of 11) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_rkv.c370 …mpp_put_bits(&bp, dxva_cxt->pp.tiles_enabled_flag ? dxva_cxt->pp.num_tile_columns_minus1 + 1 : 0, … in hal_h265d_v345_output_pps_packet()
391 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1; i++) { in hal_h265d_v345_output_pps_packet()
417 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_v345_output_pps_packet()
418 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1) - in hal_h265d_v345_output_pps_packet()
419 … (i * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1); in hal_h265d_v345_output_pps_packet()
583 mpp_put_bits(&bp, dxva_cxt->pp.num_tile_columns_minus1 + 1, 5); in hal_h265d_output_pps_packet()
604 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1; i++) { in hal_h265d_output_pps_packet()
630 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_output_pps_packet()
631 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1) - in hal_h265d_output_pps_packet()
632 … (i * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1); in hal_h265d_output_pps_packet()
H A Dhal_h265d_vdpu34x.c333 …mpp_put_bits(&bp, dxva_cxt->pp.tiles_enabled_flag ? dxva_cxt->pp.num_tile_columns_minus1 + 1 : 0, … in hal_h265d_v345_output_pps_packet()
354 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1; i++) { in hal_h265d_v345_output_pps_packet()
380 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_v345_output_pps_packet()
381 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1) - in hal_h265d_v345_output_pps_packet()
382 … (i * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1); in hal_h265d_v345_output_pps_packet()
559 mpp_put_bits(&bp, dxva_cxt->pp.num_tile_columns_minus1 + 1, 5); in hal_h265d_output_pps_packet()
580 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1; i++) { in hal_h265d_output_pps_packet()
606 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_output_pps_packet()
607 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1) - in hal_h265d_output_pps_packet()
608 … (i * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1); in hal_h265d_output_pps_packet()
[all …]
H A Dhal_h265d_vdpu382.c326 …mpp_put_bits(&bp, dxva_cxt->pp.tiles_enabled_flag ? dxva_cxt->pp.num_tile_columns_minus1 + 1 : 0, … in hal_h265d_v382_output_pps_packet()
347 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1; i++) { in hal_h265d_v382_output_pps_packet()
373 for (i = 0; i < dxva_cxt->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_v382_output_pps_packet()
374 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1) - in hal_h265d_v382_output_pps_packet()
375 … (i * pic_in_cts_width) / (dxva_cxt->pp.num_tile_columns_minus1 + 1); in hal_h265d_v382_output_pps_packet()
448 RK_U32 tile_col_cut_num = pp->num_tile_columns_minus1; in h265d_refine_rcb_size()
H A Dhal_h265d_vdpu384a.c514 …mpp_put_bits(&bp, dxva_ctx->pp.tiles_enabled_flag ? (dxva_ctx->pp.num_tile_columns_minus1 + 1) : 1… in hal_h265d_v345_output_pps_packet()
532 for (i = 0; i < dxva_ctx->pp.num_tile_columns_minus1; i++) { in hal_h265d_v345_output_pps_packet()
556 for (i = 0; i < dxva_ctx->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_v345_output_pps_packet()
557 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_ctx->pp.num_tile_columns_minus1 + 1) - in hal_h265d_v345_output_pps_packet()
558 … (i * pic_in_cts_width) / (dxva_ctx->pp.num_tile_columns_minus1 + 1); in hal_h265d_v345_output_pps_packet()
655 RK_U32 tile_col_cut_num = pp->num_tile_columns_minus1; in h265d_refine_rcb_size()
H A Dhal_h265d_vdpu383.c546 …mpp_put_bits(&bp, dxva_ctx->pp.tiles_enabled_flag ? (dxva_ctx->pp.num_tile_columns_minus1 + 1) : 1… in hal_h265d_v345_output_pps_packet()
564 for (i = 0; i < dxva_ctx->pp.num_tile_columns_minus1; i++) { in hal_h265d_v345_output_pps_packet()
588 for (i = 0; i < dxva_ctx->pp.num_tile_columns_minus1 + 1; i++) in hal_h265d_v345_output_pps_packet()
589 … column_width[i] = ((i + 1) * pic_in_cts_width) / (dxva_ctx->pp.num_tile_columns_minus1 + 1) - in hal_h265d_v345_output_pps_packet()
590 … (i * pic_in_cts_width) / (dxva_ctx->pp.num_tile_columns_minus1 + 1); in hal_h265d_v345_output_pps_packet()
659 RK_U32 tile_col_cut_num = pp->num_tile_columns_minus1; in h265d_refine_rcb_size()
/rockchip-linux_mpp/mpp/common/
H A Dh265d_syntax.h169 UCHAR num_tile_columns_minus1; member
H A Dh265e_syntax_new.h110 RK_U8 num_tile_columns_minus1; member
/rockchip-linux_mpp/mpp/codec/enc/h265/
H A Dh265e_syntax.c135 pp->num_tile_columns_minus1 = pps->m_nNumTileColumnsMinus1; in fill_picture_parameters()
138 for (i = 0; i <= pp->num_tile_columns_minus1; i++) in fill_picture_parameters()
/rockchip-linux_mpp/mpp/codec/dec/h265/
H A Dh265d_parser2_syntax.c149 pp->num_tile_columns_minus1 = pps->num_tile_columns - 1; in fill_picture_parameters()
/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu580.c2478 … RK_U32 tile_num = (syn->pp.num_tile_columns_minus1 + 1) * (syn->pp.num_tile_rows_minus1 + 1); in vepu580_h265_set_hw_address()
2840 if (index == syn->pp.num_tile_columns_minus1) { in hal_h265e_v580_set_uniform_tile()
2861 RK_U32 tile_num = (syn->pp.num_tile_columns_minus1 + 1) * (syn->pp.num_tile_rows_minus1 + 1); in hal_h265e_v580_start()
H A Dhal_h265e_vepu541.c1669 RK_U32 title_num = (syn->pp.num_tile_columns_minus1 + 1) * (syn->pp.num_tile_rows_minus1 + 1); in hal_h265e_v540_start()