Searched refs:cme_srch_v (Results 1 – 6 of 6) sorted by relevance
1040 regs->reg089.cme_srch_v = 1; in setup_vepu541_intra_refresh()1288 regs->reg089.cme_srch_v = cime_blk_h_max / 4; in setup_vepu541_me()1325 temp0 = 2 * regs->reg089.cme_srch_v + 1; in setup_vepu541_me()1359 RK_S32 swin_all_4_ver = 2 * regs->reg089.cme_srch_v + 1; in setup_vepu541_me()
1385 RK_U32 cme_srch_v : 4; member
1542 regs->reg_base.me_rnge.cme_srch_v = 1; in setup_vepu580_intra_refresh()1734 RK_S32 srch_h = base_regs->me_rnge.cme_srch_v * 4; in calc_cime_parameter()1860 regs->reg_base.me_rnge.cme_srch_v = cime_blk_h_max / 4; in setup_vepu580_me()
501 RK_U32 cme_srch_v : 4; member
265 RK_S32 srch_h = regs->reg0220_me_rnge.cme_srch_v * 4; in vepu580_h265_set_me_ram()1823 regs->reg_base.reg0220_me_rnge.cme_srch_v = 1; in setup_intra_refresh()2358 regs->reg0220_me_rnge.cme_srch_v = merangy / 32; in vepu580_h265_set_me_regs()2394 RK_S32 tmpMin = (regs->reg0220_me_rnge.cme_srch_v + 3) / 4 * 2 + 1; in vepu580_h265_set_me_regs()
494 RK_U32 cme_srch_v : 4; member