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/rk3399_rockchip-uboot/arch/arm/cpu/armv7/
H A Dcache_v7_asm.S47 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
48 clz r5, r4 @ find bit position of way size increment
54 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11
56 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11
60 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
63 subs r4, r4, #1 @ decrement the way
120 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
121 clz r5, r4 @ find bit position of way size increment
127 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11
129 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11
[all …]
H A Dpsci.S212 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
213 clz r5, r4 @ find bit position of way size increment
219 orr r11, r10, r4, lsl r5 @ factor way and cache number into r11
221 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
224 subs r4, r4, #1 @ decrement the way
/rk3399_rockchip-uboot/doc/
H A DREADME.N121323 - 32/64/128-entry 4-way set-associati.ve main TLB.
35 - Set associativity: 2-way, 4-way or direct-mapped.
H A DREADME.fsl-ddr9 | | 2-way Intlv'ed | |
13 | complexes | 2-way Intlv'ed | Not Intlv'ed | |
15 | | 3-way Intlv'ed | |
19 | complexes | 2-way Intlv'ed | 2-way Intlv'ed |
21 | | 4-way Intlv'ed |
25 Table of 2-way interleaving modes supported in cpu/8xxx/ddr/
82 # 1KB 3-way interleaving
85 # 4KB 3-way interleaving
88 # 8KB 3-way interleaving
282 Another way to enter the interactive DDR debugger without setting the
H A DREADME.OFT5 way to pass bootloader and board setup information is the open
H A DREADME.dfutftp59 This is the preferable way of using this command in the early boot stage
77 "ethact=usb_ether". In this way one can have very fast DFU transfer via USB.
H A DREADME.splashprepare14 supported locations, and a way of controlling the selected splash location
H A DREADME.JFFS225 There only one way for JFFS2 to find the disk. It uses the flash_info
H A DREADME.standalone22 machine-dependent way. PowerPC, ARM, MIPS, Blackfin and Nios II
30 way as U-Boot does:
H A DREADME.link-local39 Using NetConsole is one way to ensure that net_loop is always
H A DREADME.hwconfig21 with the environment directly, there is no way to tell that
H A DREADME.dns48 In this way, you can lookup, and set many more meaningful
/rk3399_rockchip-uboot/test/env/
H A DKconfig8 messages printed along the way.
/rk3399_rockchip-uboot/test/dm/
H A DKconfig8 messages printed along the way.
/rk3399_rockchip-uboot/test/overlay/
H A DKconfig9 messages printed along the way.
/rk3399_rockchip-uboot/doc/device-tree-bindings/mailbox/
H A Dmailbox.txt3 Generic binding to provide a way for Mailbox controller drivers to
/rk3399_rockchip-uboot/arch/nds32/cpu/n1213/
H A Dstart.S24 #define ICAC_MEM_KBF_ISET (0x07) ! I Cache sets per way
27 #define DCAC_MEM_KBF_DSET (0x07) ! D Cache sets per way
363 addi $p1, $p1, 1 ! then $p1 is I way number
396 andi $p1, $t0, DCAC_MEM_KBF_DWAY ! get bitfield of D way
398 addi $p1, $p1, 1 ! then $p1 is D way number
418 ! FIXME: Other way to get PC?
/rk3399_rockchip-uboot/board/bachmann/ot1200/
H A DREADME4 in the way ethernet is done. The variant detection is done during
/rk3399_rockchip-uboot/Licenses/
H A Dibm-pibs.txt3 copyrights to use it in any way he or she deems fit, including
/rk3399_rockchip-uboot/board/freescale/bsc9131rdb/
H A DREADME54 . 32 Kbyte 8-way level 1 instruction cache (L1 ICache)
55 . 32 Kbyte 8-way level 1 data cache (L1 DCache)
56 . 512 Kbyte 8-way level 2 unified instruction/data cache (M2 memory)
/rk3399_rockchip-uboot/board/freescale/bsc9132qds/
H A DREADME46 - 32 KB, 8-way, level 1 instruction cache (L1 ICache)
47 - 32 KB, 8-way, level 1 data cache (L1 DCache)
48 - 512 KB, 8-way, level 2 unified instruction/data cache (L2 cache/M2 memory)
/rk3399_rockchip-uboot/board/cadence/xtfpga/
H A DREADME51 The LX60/LX110/LX200/ML605 contain an 8-way DIP switch that controls
96 The KC705 board contains 4-way DIP switch, way 1 is the boot mapping
/rk3399_rockchip-uboot/arch/arc/lib/
H A Dcache.c133 unsigned int pad:24, way:2, lsz:2, sz:4; in read_decode_cache_bcr_arcv2() member
135 unsigned int sz:4, lsz:2, way:2, pad:24; in read_decode_cache_bcr_arcv2()
/rk3399_rockchip-uboot/
H A D.mailmap4 # and/or not always written the same way, making contributions from the
/rk3399_rockchip-uboot/board/keymile/km83xx/
H A DREADME.kmeter18 a simple way. Therefore it is an alternative boot eeprom on the PIGGY,

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