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Searched refs:t3 (Results 1 – 9 of 9) sorted by relevance

/rk3399_rockchip-uboot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S80 li t3, 0x03
92 addi t3, t3, -1
93 bnez t3, 1b
223 li t3, 100
228 bgt t4, t3, 0b
231 li t3, 5
267 addi t3, t3, -1
268 bnez t3, 3b
/rk3399_rockchip-uboot/board/dbau1x00/
H A Dlowlevel_init.S118 lui t3, 0xbfc0
120 bne t1, t3, noCacheJump
130 addu t3, t0, t2
135 bne t2, t3, cacheloop
139 move t3, ra
152 move ra, t3
168 mfc0 t3, CP0_INDEX
170 and t3, t4, t3
172 beq zero, t3, tlbloop
/rk3399_rockchip-uboot/arch/mips/include/asm/
H A Dregdef.h31 #define t3 $11 macro
82 #define t3 $15 macro
/rk3399_rockchip-uboot/board/imgtec/malta/
H A Dlowlevel_init.S158 li t3, MALTA_MSC01_PCIMEM_MAP
161 sw t3, MSC01_PCI_SC2PMMAPL_OFS(t0)
166 li t3, MALTA_MSC01_PCIIO_MAP
169 sw t3, MSC01_PCI_SC2PIOMAPL_OFS(t0)
/rk3399_rockchip-uboot/arch/powerpc/lib/
H A D_ashrdi3.S38 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
/rk3399_rockchip-uboot/include/optee_include/
H A Dtee_api_defines.h419 #define TEE_PARAM_TYPES(t0, t1, t2, t3) \ argument
420 ((t0) | ((t1) << 4) | ((t2) << 8) | ((t3) << 12))
/rk3399_rockchip-uboot/arch/mips/lib/
H A Dcache_init.S413 li t3, GCR_Cx_COHERENCE_EN
415 li t3, GCR_Cx_COHERENCE_DOM_EN
416 1: sw t3, GCR_Cx_COHERENCE(t0)
/rk3399_rockchip-uboot/arch/nds32/cpu/n1213/
H A Dstart.S364 add $t3, $t2, $t1 ! SHIFT
365 sll $p1, $p1, $t3 ! GET the total cache size
399 add $t3, $t2, $t1 ! SHIFT
400 sll $p1, $p1, $t3 ! GET the total cache size
/rk3399_rockchip-uboot/drivers/video/drm/
H A Ddw-dp.c1325 u32 t1 = 0, t2 = 0, t3 = 0; in dw_dp_video_enable() local
1374 t3 = average_bytes_per_tu + 1; in dw_dp_video_enable()
1376 t3 = average_bytes_per_tu; in dw_dp_video_enable()
1377 init_threshold = t1 * t2 * t3 / (1000 * 1000); in dw_dp_video_enable()