Searched refs:speeds (Results 1 – 16 of 16) sorted by relevance
73 speed = get_max_dev_speed(speeds); in get_pll_init_data()77 speed = get_max_arm_speed(speeds); in get_pll_init_data()
85 speed = get_max_dev_speed(speeds); in get_pll_init_data()89 speed = get_max_arm_speed(speeds); in get_pll_init_data()
53 int speeds[DEVSPEED_NUMSPDS] = { variable82 speed = get_max_dev_speed(speeds); in get_pll_init_data()
80 } speeds[] = { variable121 for (n=0; speeds[n].baudr; ++n) in getspeed()122 if (speeds[n].speedcode == code) in getspeed()123 return speeds[n].baudr; in getspeed()
122 extern int speeds[];
28 extracted from DDR chip datasheet. Different speeds of DDR are supported with
52 architecture (ISA) compatible, operating at speeds up to 400Mhz,
5 subsystem which offers higher speeds and more features than the
15 int __weak speeds[DEVSPEED_NUMSPDS] = { variable
37 supporting speeds up to 1600Mtps
32 2133MT/s speeds. For 1867MT/s and above, read-to-write turnaround time
205 clocks speeds etc. To generate this patched DT blob, you can use
905 limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
333 clock speeds.349 clocks speeds (up to 600MHz). If unsure, keep as 0.
137 Up to 127 devices can be on each bus. USB has four bus speeds: low