Searched refs:silicon (Results 1 – 18 of 18) sorted by relevance
27 silicon IP.36 silicon IP.
11 * LD6b consists of two silicon dies: D-chip and A-chip.
168 no-1-8-v; /* for 1.0 silicon */
607 no-1-8-v; /* for 1.0 silicon */
38 #Workaround for A-006559 needed for rev 2.0 of P2041 silicon
10 This option should be enabled by all boards using the i.MX51 silicon
111 silicon, in Hz, via an environment variable "maxcpuclk".113 The maximum clock rate allowed depends on the silicon populated on the EVM.
7 one-time by a customer at silicon mask level (i.e. not at runtime!).
142 Read silicon Revision of the DMA module
40 Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC have
25 The A8K is a hybrid SoC that contains several silicon dies interconnected in
42 pre-silicon platforms (simulator and emulator):63 32-MB NOR flash layout for pre-silicon platforms (simulator and emulator)
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
7 with PG2.0 silicon and DDR3 DRAM.
41 u32 silicon; variable
26 talking to it. Peripheral controllers are often discrete silicon,
869 The LS2080A Development System (EMULATOR) is a pre silicon881 The LS2080A Development System (QDS) is a pre silicon