| /rk3399_rockchip-uboot/drivers/clk/exynos/ |
| H A D | clk-pll.c | 23 unsigned long mdiv, sdiv, pdiv; in pll145x_get_rate() local
28 sdiv = (pll_con1 >> PLL145X_SDIV_SHIFT) & PLL145X_SDIV_MASK; in pll145x_get_rate()
31 do_div(fvco, (pdiv << sdiv)); in pll145x_get_rate()
|
| /rk3399_rockchip-uboot/arch/arm/mach-exynos/ |
| H A D | exynos4_setup.h | 341 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ argument
344 | (sdiv << 0))
|
| H A D | exynos5_setup.h | 23 #define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv) argument
|
| /rk3399_rockchip-uboot/board/samsung/trats/ |
| H A D | setup.h | 230 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\ argument
233 | (sdiv << 0))
|
| /rk3399_rockchip-uboot/drivers/video/drm/ |
| H A D | phy-rockchip-samsung-hdptx-hdmi.c | 954 u32 mdiv, sdiv, n = 8; in hdptx_phy_clk_pll_calc() local
957 for (sdiv = 1; sdiv <= 16; sdiv++) { in hdptx_phy_clk_pll_calc()
958 if (sdiv % 2 && sdiv != 1) in hdptx_phy_clk_pll_calc()
961 fvco = fout * sdiv; in hdptx_phy_clk_pll_calc()
994 if (sdiv > 16) in hdptx_phy_clk_pll_calc()
1002 cfg->pms_sdiv = sdiv - 1; in hdptx_phy_clk_pll_calc()
|
| /rk3399_rockchip-uboot/drivers/phy/ |
| H A D | phy-rockchip-samsung-hdptx.c | 367 u8 sdiv; member
942 FIELD_PREP(ROPLL_PMS_SDIV_RBR, pll_ctrl->sdiv)); in rockchip_hdptx_phy_set_rate()
950 FIELD_PREP(ROPLL_PMS_SDIV_HBR, pll_ctrl->sdiv)); in rockchip_hdptx_phy_set_rate()
958 FIELD_PREP(ROPLL_PMS_SDIV_HBR2, pll_ctrl->sdiv)); in rockchip_hdptx_phy_set_rate()
|
| /rk3399_rockchip-uboot/common/spl/ |
| H A D | spl_fit_tb_arm64.S | 394 sdiv w21, w21, w0
532 sdiv w2, w27, w1
543 sdiv w1, w1, w0
821 sdiv w2, w2, w3
1026 sdiv w0, w0, w1
|
| H A D | spl_fit_tb_px30.S | 394 sdiv w21, w21, w0
532 sdiv w2, w27, w1
543 sdiv w1, w1, w0
826 sdiv w2, w2, w3
1527 sdiv w0, w0, w1
|
| H A D | spl_fit_tb_rv1126b.S | 409 sdiv w21, w21, w0
504 sdiv w3, w0, w2
515 sdiv w1, w1, w0
853 sdiv w2, w2, w3
|
| /rk3399_rockchip-uboot/drivers/video/rk_eink/epdlut/ |
| H A D | rkf_waveform.S | 1056 sdiv w2, w21, w1
1059 sdiv w0, w0, w1
1235 sdiv w5, w0, w5
1438 sdiv w1, w1, w14
|
| H A D | pvi_waveform.S | 824 sdiv w7, w2, w6
826 sdiv w5, w5, w6
1071 sdiv w1, w1, w13
|
| /rk3399_rockchip-uboot/drivers/rknand/ |
| H A D | rk_zftl_arm_v8.S | 5595 sdiv w2, w3, w6
6037 sdiv w19, w0, w1
6561 sdiv w19, w26, w2
6790 sdiv w2, w1, w2
6839 sdiv w0, w1, w0
7682 sdiv w20, w20, w1
7938 sdiv w0, w0, w1
8905 sdiv w0, w0, w1
8975 sdiv w0, w1, w0
9218 sdiv w1, w1, w2
[all …]
|
| H A D | rk_zftl_spl_arm_v8.S | 5768 sdiv w2, w3, w6
6282 sdiv w19, w0, w1
6935 sdiv w19, w26, w2
7164 sdiv w2, w1, w2
7213 sdiv w0, w1, w0
7898 sdiv w20, w20, w1
8154 sdiv w0, w0, w1
9139 sdiv w0, w0, w1
9209 sdiv w0, w1, w0
9537 sdiv w1, w1, w2
[all …]
|
| H A D | rk_ftl_arm_v8.S | 2402 sdiv w0, w0, w1
3912 sdiv w5, w0, w5
3944 sdiv w5, w0, w5
5368 sdiv w5, w0, w5
6630 sdiv w19, w19, w0
8080 sdiv w1, w1, w0
9462 sdiv w1, w1, w0
9588 sdiv w3, w1, w3
12699 sdiv w20, w20, w24
|
| /rk3399_rockchip-uboot/drivers/misc/ |
| H A D | rk3588-secure-otp.S | 257 sdiv w0, w2, w0
670 sdiv w0, w0, w23
|
| H A D | rk3576-secure-otp.S | 357 sdiv w0, w0, w25
574 sdiv w0, w20, w26
|
| H A D | px30-secure-otp.S | 24 sdiv w3, w3, w1
75 sdiv w3, w3, w0
|
| H A D | rk3308-secure-otp.S | 24 sdiv w3, w3, w1
75 sdiv w3, w3, w0
|
| H A D | rk3528-secure-otp.S | 2414 sdiv w0, w21, w0
|
| H A D | rk3568-secure-otp.S | 2425 sdiv w0, w20, w0
|
| H A D | rk3562-secure-otp.S | 2414 sdiv w0, w21, w0
|
| H A D | rv1126b-secure-otp.S | 2698 sdiv w0, w22, w0
|
| /rk3399_rockchip-uboot/drivers/rkflash/ |
| H A D | rk_sftl_arm_v8.S | 188 sdiv w0, w0, w6
1326 sdiv w5, w0, w5
1358 sdiv w5, w0, w5
2982 sdiv w5, w0, w5
3408 sdiv w20, w20, w24
9144 sdiv w0, w0, w1
|