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Searched refs:rk3528_pll_clks (Results 1 – 1 of 1) sorted by relevance

/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3528.c65 static struct rockchip_pll_clock rk3528_pll_clks[] = { variable
210 old_rate = rockchip_pll_get_rate(&rk3528_pll_clks[APLL], priv->cru, APLL); in rk3528_armclk_set_clk()
212 if (rockchip_pll_set_rate(&rk3528_pll_clks[APLL], in rk3528_armclk_set_clk()
228 if (rockchip_pll_set_rate(&rk3528_pll_clks[APLL], in rk3528_armclk_set_clk()
1346 rate = rockchip_pll_get_rate(&rk3528_pll_clks[APLL], priv->cru, in rk3528_clk_get_rate()
1350 rate = rockchip_pll_get_rate(&rk3528_pll_clks[CPLL], priv->cru, in rk3528_clk_get_rate()
1354 rate = rockchip_pll_get_rate(&rk3528_pll_clks[GPLL], priv->cru, in rk3528_clk_get_rate()
1359 rate = rockchip_pll_get_rate(&rk3528_pll_clks[PPLL], priv->cru, in rk3528_clk_get_rate()
1363 rate = rockchip_pll_get_rate(&rk3528_pll_clks[DPLL], priv->cru, in rk3528_clk_get_rate()
1469 ret = rockchip_pll_set_rate(&rk3528_pll_clks[CPLL], priv->cru, in rk3528_clk_set_rate()
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