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Searched refs:phy1_mplla (Results 1 – 1 of 1) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Dspl_pcie_ep_boot.c437 u32 phy0_mplla, phy1_mplla, t0 = 0, t1 = 0; in pcie_cru_init() local
497 phy1_mplla = readl(PCIE3PHY_GRF_BASE + 0xA04); in pcie_cru_init()
499 if (phy0_mplla != t0 || phy1_mplla != t1) { in pcie_cru_init()
500 printep("RKEP: GRF:904=%x, a04=%x...\n", phy0_mplla, phy1_mplla); in pcie_cru_init()
503 t1 = phy1_mplla; in pcie_cru_init()
506 if (PHY_MODE_PCIE == PHY_MODE_PCIE_AGGREGATION && RK3588_SRAM_INIT_DONE(phy1_mplla)) in pcie_cru_init()