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Searched refs:lvds (Results 1 – 25 of 25) sorted by relevance

/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip_lvds.c94 int (*probe)(struct rockchip_lvds *lvds);
95 void (*enable)(struct rockchip_lvds *lvds, int pipe);
96 void (*disable)(struct rockchip_lvds *lvds);
116 struct rockchip_lvds *lvds = dev_get_priv(conn->dev); in rockchip_lvds_connector_init() local
121 lvds->mode = &conn_state->mode; in rockchip_lvds_connector_init()
122 lvds->phy = conn->phy; in rockchip_lvds_connector_init()
123 conn_state->disp_info = rockchip_get_disp_info(conn_state->type, lvds->id); in rockchip_lvds_connector_init()
130 lvds->format = LVDS_6BIT_MODE; in rockchip_lvds_connector_init()
133 lvds->format = LVDS_8BIT_MODE_FORMAT_2; in rockchip_lvds_connector_init()
136 lvds->format = LVDS_10BIT_MODE_FORMAT_1; in rockchip_lvds_connector_init()
[all …]
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_lvds.c34 rk628->lvds.format = LVDS_FORMAT_JEIDA_24BIT; in rk628_lvds_parse()
36 rk628->lvds.format = LVDS_FORMAT_JEIDA_18BIT; in rk628_lvds_parse()
38 rk628->lvds.format = LVDS_FORMAT_VESA_18BIT; in rk628_lvds_parse()
40 rk628->lvds.format = LVDS_FORMAT_VESA_24BIT; in rk628_lvds_parse()
44 rk628->lvds.link_type = LVDS_DUAL_LINK_ODD_EVEN_PIXELS; in rk628_lvds_parse()
46 rk628->lvds.link_type = LVDS_DUAL_LINK_EVEN_ODD_PIXELS; in rk628_lvds_parse()
48 rk628->lvds.link_type = LVDS_DUAL_LINK_LEFT_RIGHT_PIXELS; in rk628_lvds_parse()
50 rk628->lvds.link_type = LVDS_DUAL_LINK_RIGHT_LEFT_PIXELS; in rk628_lvds_parse()
52 rk628->lvds.link_type = LVDS_SINGLE_LINK; in rk628_lvds_parse()
63 enum lvds_link_type link_type = rk628->lvds.link_type; in rk628_lvds_enable()
[all …]
H A Drk628.h526 struct rk628_lvds lvds; member
/rk3399_rockchip-uboot/doc/device-tree-bindings/video/
H A Drockchip-lvds.txt5 - compatible: "rockchip,rk3288-lvds";
26 lvds: lvds@ff96c000 {
27 compatible = "rockchip,rk3288-lvds";
57 &lvds {
H A Dtegra20-dc.txt35 - nvidia,lvds-shutdown-gpios: LVDS power shutdown GPIO
81 nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
/rk3399_rockchip-uboot/drivers/video/rockchip/
H A Drk_lvds.c44 static inline void lvds_writel(struct rk_lvds_priv *lvds, u32 offset, u32 val) in lvds_writel() argument
46 writel(val, lvds->regs + offset); in lvds_writel()
48 writel(val, lvds->regs + offset + 0x100); in lvds_writel()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dtegra20-medcom-wide.dts62 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
H A Dtegra20-tec.dts74 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
H A Dimx6q.dtsi241 lvds-channel@0 {
259 lvds-channel@1 {
H A Drk3562.dtsi292 rkcif_mipi_lvds: rkcif-mipi-lvds {
293 compatible = "rockchip,rkcif-mipi-lvds";
299 rkcif_mipi_lvds_sditf: rkcif-mipi-lvds-sditf {
305 rkcif_mipi_lvds_sditf_vir1: rkcif-mipi-lvds-sditf-vir1 {
311 rkcif_mipi_lvds_sditf_vir2: rkcif-mipi-lvds-sditf-vir2 {
317 rkcif_mipi_lvds_sditf_vir3: rkcif-mipi-lvds-sditf-vir3 {
324 compatible = "rockchip,rkcif-mipi-lvds";
355 compatible = "rockchip,rkcif-mipi-lvds";
386 compatible = "rockchip,rkcif-mipi-lvds";
708 lvds: lvds { label
[all …]
H A Drk3128.dtsi432 route_lvds: route-lvds {
609 lvds: lvds { label
610 compatible = "rockchip,rk3126-lvds";
H A Drv1103b.dtsi169 rkcif_mipi_lvds: rkcif-mipi-lvds {
170 compatible = "rockchip,rkcif-mipi-lvds";
175 rkcif_mipi_lvds_sditf: rkcif-mipi-lvds-sditf {
182 compatible = "rockchip,rkcif-mipi-lvds";
H A Drv1106.dtsi150 rkcif_mipi_lvds: rkcif-mipi-lvds {
151 compatible = "rockchip,rkcif-mipi-lvds";
156 rkcif_mipi_lvds_sditf: rkcif-mipi-lvds-sditf {
163 compatible = "rockchip,rkcif-mipi-lvds";
H A Drk3288.dtsi201 route_lvds: route-lvds {
860 lvds: lvds@ff96c000 { label
861 compatible = "rockchip,rk3288-lvds";
H A Drv1126b.dtsi448 rkcif_mipi_lvds: rkcif-mipi-lvds {
449 compatible = "rockchip,rkcif-mipi-lvds";
454 rkcif_mipi_lvds_sditf: rkcif-mipi-lvds-sditf {
460 rkcif_mipi_lvds_sditf_vir1: rkcif-mipi-lvds-sditf-vir1 {
466 rkcif_mipi_lvds_sditf_vir2: rkcif-mipi-lvds-sditf-vir2 {
472 rkcif_mipi_lvds_sditf_vir3: rkcif-mipi-lvds-sditf-vir3 {
479 compatible = "rockchip,rkcif-mipi-lvds";
509 compatible = "rockchip,rkcif-mipi-lvds";
539 compatible = "rockchip,rkcif-mipi-lvds";
H A Dexynos5420-peach-pit.dts78 edp-lvds-bridge@48 {
H A Drk3576.dtsi792 rkcif_mipi_lvds: rkcif-mipi-lvds {
793 compatible = "rockchip,rkcif-mipi-lvds";
799 rkcif_mipi_lvds_sditf: rkcif-mipi-lvds-sditf {
805 rkcif_mipi_lvds_sditf_vir1: rkcif-mipi-lvds-sditf-vir1 {
811 rkcif_mipi_lvds_sditf_vir2: rkcif-mipi-lvds-sditf-vir2 {
817 rkcif_mipi_lvds_sditf_vir3: rkcif-mipi-lvds-sditf-vir3 {
824 compatible = "rockchip,rkcif-mipi-lvds";
855 compatible = "rockchip,rkcif-mipi-lvds";
886 compatible = "rockchip,rkcif-mipi-lvds";
917 compatible = "rockchip,rkcif-mipi-lvds";
H A Dexynos5250-snow.dts194 ptn3460: lvds-bridge@20 {
H A Dimx6qdl.dtsi817 lvds-channel@0 {
840 lvds-channel@1 {
H A Dpx30.dtsi315 lvds: lvds { label
316 compatible = "rockchip,px30-lvds";
H A Dr8a7795.dtsi1769 reg-names = "du", "lvds.0";
1779 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
H A Drk3568.dtsi424 compatible = "rockchip,rk3568-lvds";
452 compatible = "rockchip,rk3568-lvds";
1133 compatible = "rockchip,rkcif-mipi-lvds";
/rk3399_rockchip-uboot/doc/device-tree-bindings/video/bridge/
H A Dps8622.txt20 lvds-bridge@48 {
/rk3399_rockchip-uboot/board/boundary/nitrogen6x/
H A DREADME53 wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A DKconfig788 bool "Generic lvds interface LCD panel"