Searched refs:input_clk (Results 1 – 8 of 8) sorted by relevance
43 unsigned long input_clk; /* master clock (Hz) */ member60 priv->input_clk = IOBUS_FREQ; in uniphier_i2c_probe()184 writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed), in uniphier_i2c_set_bus_speed()
151 static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk, in cdns_i2c_calc_divs() argument159 temp = input_clk / (22 * fscl); in cdns_i2c_calc_divs()170 div_b = DIV_ROUND_UP(input_clk, 22 * fscl * (div_a + 1)); in cdns_i2c_calc_divs()176 actual_fscl = input_clk / (22 * (div_a + 1) * (div_b + 1)); in cdns_i2c_calc_divs()
206 unsigned int input_clk; in rockchip_emmc_set_clock() local228 input_clk = clk_set_rate(&priv->emmc_clk, clock); in rockchip_emmc_set_clock()229 if (IS_ERR_VALUE(input_clk)) in rockchip_emmc_set_clock()230 input_clk = host->max_clk; in rockchip_emmc_set_clock()239 if ((input_clk / div) <= clock) in rockchip_emmc_set_clock()251 if (input_clk <= clock) { in rockchip_emmc_set_clock()257 if ((input_clk / div) <= clock) in rockchip_emmc_set_clock()266 if ((input_clk / div) <= clock) in rockchip_emmc_set_clock()
40 sysclk2 = host->input_clk; in dmmc_set_clock()
54 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); in board_mmc_init()
150 uint input_clk; /* Input clock to MMC controller */ member
367 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); in board_mmc_init()
211 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); in board_mmc_init()