| #
1bf19a93 |
| 14-Jan-2025 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
drivers: rockchip_sdhci: fix ds dll config for rk3576
Set the default ds dll tap value to 0x7 for hs400 to
support some new emmc devices.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Cha
drivers: rockchip_sdhci: fix ds dll config for rk3576
Set the default ds dll tap value to 0x7 for hs400 to
support some new emmc devices.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I68c10f1724cddb0d39ce32981b7fa008f63cc183
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| #
80715258 |
| 01-Apr-2024 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
drivers: rockchip_sdhci: set RK_TAP_VALUE_SEL flag for rk3568 and rk3588
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I7729b3c208f09428105785e14356a42ecbd44e3e
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| #
b9c90533 |
| 01-Apr-2024 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
drivers: rockchip_sdhci: fix some config for rk3576
1. Set the default tx dll tap value to 0x7 for hs400.
2. Set the default cmd dll tap value to 0x7.
3. Configure the RK_TAP_VALUE_SEL flag.
Signed
drivers: rockchip_sdhci: fix some config for rk3576
1. Set the default tx dll tap value to 0x7 for hs400.
2. Set the default cmd dll tap value to 0x7.
3. Configure the RK_TAP_VALUE_SEL flag.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Iaff0441377c80421af44821ea28343fdf70a5f63
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| #
ed382477 |
| 14-Feb-2023 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: fix hs200 tuning issue for rk3528 and rk3562
1. fixed TAP_VALUE for DLL config.
2. remove RXCLK_NO_INVERTER config.
3. config cmd tap, tx tap and strobeint tap for hs400.
Signe
mmc: rockchip_sdhci: fix hs200 tuning issue for rk3528 and rk3562
1. fixed TAP_VALUE for DLL config.
2. remove RXCLK_NO_INVERTER config.
3. config cmd tap, tx tap and strobeint tap for hs400.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I16422ccbea5818cb3f1f1b4d1ca01144e5764049
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| #
1976213d |
| 08-Feb-2023 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci: add function sdhci_enable_clk
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I8b738489a5094acb74749b9e9afd3999d6ca0571
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| #
fb43afc4 |
| 14-Feb-2023 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
Revert "mmc: sdhci: add execute_tuning_end api for RK3528 to support HS400"
This reverts commit 59b2bce9b7f26ba45a588a67a1a03ea44b694376.
Change-Id: Ia6d7ee42260009253098b4764ba6eab5e0029b71
Signed
Revert "mmc: sdhci: add execute_tuning_end api for RK3528 to support HS400"
This reverts commit 59b2bce9b7f26ba45a588a67a1a03ea44b694376.
Change-Id: Ia6d7ee42260009253098b4764ba6eab5e0029b71
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
show more ...
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| #
0ae498f9 |
| 14-Feb-2023 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
Revert "drivers: mmc: rockchip_sdhci: reset tuning data while re-init"
This reverts commit 922287ecea5b5d120da99ae319b2bbc05d33dfa0.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-I
Revert "drivers: mmc: rockchip_sdhci: reset tuning data while re-init"
This reverts commit 922287ecea5b5d120da99ae319b2bbc05d33dfa0.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I8e61bbfcd2258431c83101d256b73950b302ac33
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| #
0fa64586 |
| 12-Jan-2023 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
drivers: mmc: rockchip_sdhci: add config for rk3562
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I158fe43b1f3593eac7795070e6e6d2b1a69c83ea
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| #
922287ec |
| 30-Jan-2023 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
drivers: mmc: rockchip_sdhci: reset tuning data while re-init
If the EMMC is reinitialized, the value of tuning is not reliable
and needs to be reset.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-c
drivers: mmc: rockchip_sdhci: reset tuning data while re-init
If the EMMC is reinitialized, the value of tuning is not reliable
and needs to be reset.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Iad1a0faa123fbf7ea82af60304cd31dc62da252b
show more ...
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| #
3ee58449 |
| 20-Dec-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: fix some emmc devices fail to enable hs400es
Some emmc devices need add a delay before send command.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ib6aefe0
mmc: rockchip_sdhci: fix some emmc devices fail to enable hs400es
Some emmc devices need add a delay before send command.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ib6aefe0c36f4859fee7718a171050a5efde779b5
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| #
68834fe2 |
| 20-Dec-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: disable output clock while configuring DLL
Turn off the output clock according to the design recommendations
while configuring DLL parameters.
Signed-off-by: Yifeng Zhao <yifen
mmc: rockchip_sdhci: disable output clock while configuring DLL
Turn off the output clock according to the design recommendations
while configuring DLL parameters.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I85e940939a62140dbf40bd7690d928c5ed475cde
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| #
59b2bce9 |
| 20-Dec-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci: add execute_tuning_end api for RK3528 to support HS400
The rxclk tap tuning by HS200 mode is unsuited for HS400 mode,
in addition, when switching from HS200 mode to HS mode, errors
may o
mmc: sdhci: add execute_tuning_end api for RK3528 to support HS400
The rxclk tap tuning by HS200 mode is unsuited for HS400 mode,
in addition, when switching from HS200 mode to HS mode, errors
may occur while sending commands.
It need to manually configure rxclk tap, and disable the tuning
parameter while in hs mode.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I7bb3e4fcf19aa0a80fca74122a2c1b3d81dbf361
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| #
7a9b5d70 |
| 02-Dec-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: support drive strength config for emmc by dts
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I9f6b924b3e9ebc81aedf67dc837a9aa706dc3217
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| #
13669fc5 |
| 28-Nov-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip: support hs400es mode
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I5c80afca7cdd5616935f65914872a972c892c775
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| #
5e555c00 |
| 22-Nov-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: support for rk3528
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If228008ecdfde9ccdf55f971c34f4fe8c80510fa
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| #
2cdd2239 |
| 17-Jun-2022 |
Jianqun Xu <jay.xu@rock-chips.com> |
mmc: rockchip_sdhci check grf_base pointer with IS_ERR
Change-Id: I168d26ad4b7f90da5615bec02e36cf95fca0eab9
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
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| #
90747fa1 |
| 25-Mar-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: Configure the best TX tap value for HS200 mode
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I4d5930c2ff7189107a051d5074b80f852abcd431
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| #
52e86220 |
| 16-Mar-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: disabled RX clock inverter
This will fix a bug at 52Mhz cclk with 3.3v vccq:
[03/16/11:02:15]MMC error: The cmd index is 6, ret is -70.....
[03/16/11:02:15]MMC error: The cmd in
mmc: rockchip_sdhci: disabled RX clock inverter
This will fix a bug at 52Mhz cclk with 3.3v vccq:
[03/16/11:02:15]MMC error: The cmd index is 6, ret is -70.....
[03/16/11:02:15]MMC error: The cmd index is 6, ret is -70.....
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Id047d76269fcc04edd4b36778ce2622def3ee620
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| #
dd0862ac |
| 19-Jan-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: remove SDHCI_QUIRK_WAIT_SEND_CMD config
The SDHCI controller build in RK3399, RK3568 and RK3588 have
no broken features and no need to set SDHCI_QUIRK_WAIT_SEND_CMD.
Signed-off
mmc: rockchip_sdhci: remove SDHCI_QUIRK_WAIT_SEND_CMD config
The SDHCI controller build in RK3399, RK3568 and RK3588 have
no broken features and no need to set SDHCI_QUIRK_WAIT_SEND_CMD.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I48770f93bfc71cf3bad02f982fdc7845c12d4624
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| #
7e0fdcc6 |
| 26-Nov-2021 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: RX src clock change to rxclk_i
It probability fail to send the command while select the
txclk_dll_muc for the RX source clock，so can only use
rxclk_i for the RX source clock.
F
mmc: rockchip_sdhci: RX src clock change to rxclk_i
It probability fail to send the command while select the
txclk_dll_muc for the RX source clock，so can only use
rxclk_i for the RX source clock.
Fix bug:
MMC error: The cmd index is 6, ret is -70
MMC error: The cmd index is 6, ret is -70
MMC error: The cmd index is 6, ret is -70
mmc_init: -70, time 83
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Idab0557fe9e8bf08b1a8ffd2da1a9447ef161a0e
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| #
a4de9eca |
| 13-Nov-2021 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: rockchip_sdhci: enable HS400 for rk3588
1. set CARD_IS_EMMC bit to enable Data Strobe for HS400
2. config the transmit clock source (DLL TX) is original clock input
3. config Command output sou
mmc: rockchip_sdhci: enable HS400 for rk3588
1. set CARD_IS_EMMC bit to enable Data Strobe for HS400
2. config the transmit clock source (DLL TX) is original clock input
3. config Command output source and Command output enable are from
register output triggered by clock falling edge
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Idcd78fa91a53995888bf692f09e3d442eab0a323
show more ...
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| #
f9527902 |
| 06-Aug-2021 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
drivers: mmc: support for rk3588
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ic5a915f193cf807b534dbb1935bc5d7fcdd29923
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| #
0bcee30c |
| 05-Jul-2021 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
drivers: mmc: rockchip_sdhci: add support for rk3588
Add support for rk3588, here a short summary of the changes:
- Add compatible for rk3588.
- Add soc_id for runtime judgment soc.
- Remove DLL_RXC
drivers: mmc: rockchip_sdhci: add support for rk3588
Add support for rk3588, here a short summary of the changes:
- Add compatible for rk3588.
- Add soc_id for runtime judgment soc.
- Remove DLL_RXCLK_NO_INVERTER config for clock less than 100Mhz.
- Add hs400 dll config for rk3588.
- Add set_ios_post call back function.
- Remove set_clock call back function.
- Reorder header inclusion.
- Remove phy_init call back function.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I2915162e784eedf516344f4174591ec79b338b7f
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| #
ca831a23 |
| 05-Jul-2021 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
drivers: mmc: rockchip_sdhci: modify the prefix of some common function names to rockchip
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I0f5206cc6ef746c9be2317853306dca93e50eaa4
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| #
a4ec4b18 |
| 13-Oct-2021 |
Nico Cheng <nico.cheng@rock-chips.com> |
mmc: sdhci: rockchip: REN Enable on STRB Line for HS400
This patch is used to enable STRB line, HS400 mode cannot run
without this configuration.
Signed-off-by: Nico Cheng <nico.cheng@rock-chips.co
mmc: sdhci: rockchip: REN Enable on STRB Line for HS400
This patch is used to enable STRB line, HS400 mode cannot run
without this configuration.
Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
Change-Id: I8542f5bca065ca321cb8050e242195b5af9c7067
show more ...
|