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Searched refs:i2s (Results 1 – 25 of 46) sorted by relevance

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/rk3399_rockchip-uboot/drivers/sound/
H A Dsound-i2s.c32 static int get_sound_i2s_values(struct i2stx_info *i2s, const void *blob) in get_sound_i2s_values() argument
55 i2s->base_address = base; in get_sound_i2s_values()
57 i2s->audio_pll_clk = fdtdec_get_int(blob, in get_sound_i2s_values()
59 error |= i2s->audio_pll_clk; in get_sound_i2s_values()
60 debug("audio_pll_clk = %d\n", i2s->audio_pll_clk); in get_sound_i2s_values()
61 i2s->samplingrate = fdtdec_get_int(blob, in get_sound_i2s_values()
63 error |= i2s->samplingrate; in get_sound_i2s_values()
64 debug("samplingrate = %d\n", i2s->samplingrate); in get_sound_i2s_values()
65 i2s->bitspersample = fdtdec_get_int(blob, in get_sound_i2s_values()
67 error |= i2s->bitspersample; in get_sound_i2s_values()
[all …]
H A Drockchip-i2s.c134 struct rk_i2s_dev *i2s = dev_get_priv(dev); in rk_i2s_set_sysclk() local
136 clk_set_rate(&i2s->mclk, freq); in rk_i2s_set_sysclk()
149 struct rk_i2s_dev *i2s = dev_get_priv(dev); in rockchip_i2s_probe() local
152 i2s->regbase = dev_read_addr_ptr(dev); in rockchip_i2s_probe()
154 ret = clk_get_by_name(dev, "i2s_clk", &i2s->mclk); in rockchip_i2s_probe()
160 dump_regs(i2s); in rockchip_i2s_probe()
186 UCLASS_DRIVER(i2s) = {
H A DMakefile9 obj-$(CONFIG_I2S) += sound-i2s.o
10 obj-$(CONFIG_I2S_ROCKCHIP) += rockchip-i2s.o
11 obj-$(CONFIG_I2S_SAMSUNG) += samsung-i2s.o
H A DKconfig12 audio codecs are called from the sound-i2s code. This could be
/rk3399_rockchip-uboot/doc/device-tree-bindings/exynos/
H A Dsound.txt3 The device node for sound subsytem which contains codec and i2s block
8 - samsung,i2s-epll-clock-frequency : epll clock output frequency in Hz
9 - samsung,i2s-sampling-rate : sampling rate, default is 48000
10 - samsung,i2s-bits-per-sample : sample width, defalut is 16 bit
11 - samsung,i2s-channels : nummber of channels, default is 2
12 - samsung,i2s-lr-clk-framesize : lr clock frame size
13 - samsung,i2s-bit-clk-framesize : bit clock frame size
20 samsung,i2s-epll-clock-frequency = <192000000>;
21 samsung,i2s-sampling-rate = <48000>;
22 samsung,i2s-bits-per-sample = <16>;
[all …]
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dexynos5250.dtsi85 samsung,i2s-epll-clock-frequency = <192000000>;
86 samsung,i2s-sampling-rate = <48000>;
87 samsung,i2s-bits-per-sample = <16>;
88 samsung,i2s-channels = <2>;
89 samsung,i2s-lr-clk-framesize = <256>;
90 samsung,i2s-bit-clk-framesize = <32>;
91 samsung,i2s-id = <0>;
97 samsung,i2s-epll-clock-frequency = <192000000>;
98 samsung,i2s-sampling-rate = <48000>;
99 samsung,i2s-bits-per-sample = <16>;
[all …]
H A Dtegra114.dtsi576 tegra_i2s0: i2s@70080300 {
577 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
582 reset-names = "i2s";
586 tegra_i2s1: i2s@70080400 {
587 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
592 reset-names = "i2s";
596 tegra_i2s2: i2s@70080500 {
597 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
602 reset-names = "i2s";
606 tegra_i2s3: i2s@70080600 {
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H A Dtegra30.dtsi707 tegra_i2s0: i2s@70080300 {
708 compatible = "nvidia,tegra30-i2s";
713 reset-names = "i2s";
717 tegra_i2s1: i2s@70080400 {
718 compatible = "nvidia,tegra30-i2s";
723 reset-names = "i2s";
727 tegra_i2s2: i2s@70080500 {
728 compatible = "nvidia,tegra30-i2s";
733 reset-names = "i2s";
737 tegra_i2s3: i2s@70080600 {
[all …]
H A Dtegra124.dtsi816 tegra_i2s0: i2s@70301000 {
817 compatible = "nvidia,tegra124-i2s";
822 reset-names = "i2s";
826 tegra_i2s1: i2s@70301100 {
827 compatible = "nvidia,tegra124-i2s";
832 reset-names = "i2s";
836 tegra_i2s2: i2s@70301200 {
837 compatible = "nvidia,tegra124-i2s";
842 reset-names = "i2s";
846 tegra_i2s3: i2s@70301300 {
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H A Drk3588.dtsi105 i2s8_8ch: i2s@fddc8000 {
106 compatible = "rockchip,rk3588-i2s-tdm";
131 i2s6_8ch: i2s@fddf4000 {
132 compatible = "rockchip,rk3588-i2s-tdm";
145 i2s7_8ch: i2s@fddf8000 {
146 compatible = "rockchip,rk3588-i2s-tdm";
159 i2s10_8ch: i2s@fde00000 {
160 compatible = "rockchip,rk3588-i2s-tdm";
H A Drk3308.dtsi378 i2s0: i2s@ff300000 {
379 compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
383 i2s1: i2s@ff310000 {
384 compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
388 i2s2: i2s@ff320000 {
389 compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
393 i2s3: i2s@ff330000 {
394 compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
H A Drk3066a.dtsi60 i2s0: i2s@10118000 {
61 compatible = "rockchip,rk3066-i2s";
77 i2s1: i2s@1011a000 {
78 compatible = "rockchip,rk3066-i2s";
94 i2s2: i2s@1011c000 {
95 compatible = "rockchip,rk3066-i2s";
H A Dbcm283x.dtsi147 i2s: i2s@7e203000 { label
148 compatible = "brcm,bcm2835-i2s";
H A Dtegra20.dtsi283 tegra_i2s1: i2s@70002800 {
284 compatible = "nvidia,tegra20-i2s";
289 reset-names = "i2s";
295 tegra_i2s2: i2s@70002a00 {
296 compatible = "nvidia,tegra20-i2s";
301 reset-names = "i2s";
H A Drk322x.dtsi146 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
161 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
174 compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
H A Drk3328.dtsi131 i2s0: i2s@ff000000 {
132 compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
143 i2s1: i2s@ff010000 {
144 compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
155 i2s2: i2s@ff020000 {
156 compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
H A Drk3588s.dtsi1076 i2s4_8ch: i2s@fddc0000 {
1077 compatible = "rockchip,rk3588-i2s-tdm";
1102 i2s5_8ch: i2s@fddf0000 {
1103 compatible = "rockchip,rk3588-i2s-tdm";
1116 i2s9_8ch: i2s@fddfc000 {
1117 compatible = "rockchip,rk3588-i2s-tdm";
1396 i2s0_8ch: i2s@fe470000 {
1397 compatible = "rockchip,rk3588-i2s-tdm";
1421 i2s1_8ch: i2s@fe480000 {
1422 compatible = "rockchip,rk3588-i2s-tdm";
[all …]
H A Drk3188.dtsi73 i2s0: i2s@1011a000 {
74 compatible = "rockchip,rk3188-i2s", "rockchip,rk3066-i2s";
H A Drk3399-puma.dtsi66 simple-audio-card,format = "i2s";
82 simple-audio-card,format = "i2s";
448 rockchip,i2s-broken-burst-len;
H A Dpx30.dtsi239 i2s0_8ch: i2s@ff060000 {
240 compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
250 i2s1_2ch: i2s@ff070000 {
251 compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
261 i2s2_2ch: i2s@ff080000 {
262 compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
H A Dstih410-b2260.dts213 format = "i2s";
H A Drk3288.dtsi690 i2s: i2s@ff890000 { label
691 compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
922 i2s-controller = <&i2s>;
H A Drk3399.dtsi1465 i2s0: i2s@ff880000 {
1466 compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s";
1480 i2s1: i2s@ff890000 {
1481 compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s";
1494 i2s2: i2s@ff8a0000 {
1495 compatible = "rockchip,rk3399-i2s", "rockchip,rk3066-i2s";
/rk3399_rockchip-uboot/arch/xtensa/dts/
H A Dxtfpga.dtsi78 i2s0: xtfpga-i2s@0d080000 {
80 compatible = "cdns,xtfpga-i2s";
123 simple-audio-card,format = "i2s";
/rk3399_rockchip-uboot/arch/arm/mach-exynos/include/mach/
H A Dcpu.h293 SAMSUNG_BASE(i2s, I2S_BASE)

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