Home
last modified time | relevance | path

Searched refs:endian (Results 1 – 25 of 36) sorted by relevance

12

/rk3399_rockchip-uboot/fs/zfs/
H A Dzfs_fletcher.c36 zfs_endian_t endian, in fletcher_2_endian() argument
44 a0 += zfs_to_cpu64(ip[0], endian); in fletcher_2_endian()
45 a1 += zfs_to_cpu64(ip[1], endian); in fletcher_2_endian()
50 zcp->zc_word[0] = cpu_to_zfs64(a0, endian); in fletcher_2_endian()
51 zcp->zc_word[1] = cpu_to_zfs64(a1, endian); in fletcher_2_endian()
52 zcp->zc_word[2] = cpu_to_zfs64(b0, endian); in fletcher_2_endian()
53 zcp->zc_word[3] = cpu_to_zfs64(b1, endian); in fletcher_2_endian()
57 fletcher_4_endian(const void *buf, uint64_t size, zfs_endian_t endian, in fletcher_4_endian() argument
65 a += zfs_to_cpu32(ip[0], endian); in fletcher_4_endian()
71 zcp->zc_word[0] = cpu_to_zfs64(a, endian); in fletcher_4_endian()
[all …]
H A Dzfs.c142 zfs_endian_t endian; member
210 static int zio_read_data(blkptr_t *bp, zfs_endian_t endian,
214 zio_read(blkptr_t *bp, zfs_endian_t endian, void **buf,
238 zfs_endian_t endian __attribute__ ((unused)), in zio_checksum_off() argument
266 zfs_endian_t endian, char *buf, int size) in zio_checksum_verify() argument
280 ci->ci_func(buf, size, endian, &actual_cksum); in zio_checksum_verify()
284 ci->ci_func(buf, size, endian, &actual_cksum); in zio_checksum_verify()
349 zfs_endian_t endian = UNKNOWN_ENDIAN; in uberblock_verify() local
361 endian = LITTLE_ENDIAN; in uberblock_verify()
366 endian = BIG_ENDIAN; in uberblock_verify()
[all …]
H A Dzfs_sha256.c105 zfs_endian_t endian, zio_cksum_t *zcp) in zio_checksum_SHA256() argument
129 endian); in zio_checksum_SHA256()
131 endian); in zio_checksum_SHA256()
133 endian); in zio_checksum_SHA256()
135 endian); in zio_checksum_SHA256()
/rk3399_rockchip-uboot/include/zfs/
H A Dzio_checksum.h19 zfs_endian_t endian, zio_cksum_t *zcp);
32 zfs_endian_t endian, zio_cksum_t *);
33 extern void fletcher_2_endian(const void *, uint64_t, zfs_endian_t endian,
35 extern void fletcher_4_endian(const void *, uint64_t, zfs_endian_t endian,
/rk3399_rockchip-uboot/doc/
H A DREADME.fsl-esdhc18 ESDHC IP is in little-endian mode. Accessing ESDHC registers can be
19 determined by ESDHC IP's endian mode or processor's endian mode.
21 ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined
22 by ESDHC IP's endian mode or processor's endian mode.
H A DREADME.generic_usb_ohci38 The USB bus operates in little endian, but unfortunately there are
39 OHCI controllers that operate in big endian such as ppc4xx. For these the
H A DREADME.qemu-mips10 Supports little and big endian as well as 32 bit and 64 bit.
25 32 bit, big endian:
29 32 bit, little endian:
33 64 bit, big endian:
37 64 bit, little endian:
/rk3399_rockchip-uboot/board/pb1x00/
H A DREADME9 Support was originally big endian only.
11 configurations in little endian mode.
45 PCMCIA and running cpu in big endian mode!!!!
52 dbau1x00. The endian will then be correct.
55 you need. Then write a simple program that endian swaps
/rk3399_rockchip-uboot/board/dbau1x00/
H A DREADME9 Support was originally big endian only.
11 configurations in little endian mode.
45 PCMCIA and running cpu in big endian mode!!!!
52 dbau1x00. The endian will then be correct.
55 you need. Then write a simple program that endian swaps
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dls1021a.dtsi88 big-endian;
98 big-endian;
106 big-endian;
156 big-endian;
169 big-endian;
181 big-endian;
310 big-endian;
322 big-endian;
335 big-endian;
349 big-endian;
[all …]
H A Dfsl-ls1012a.dtsi53 big-endian;
61 big-endian;
69 big-endian;
118 big-endian;
129 big-endian;
H A Dfsl-ls1046a.dtsi59 big-endian;
72 big-endian;
216 big-endian;
248 big-endian;
264 big-endian;
281 big-endian;
H A Dfsl-ls1043a.dtsi59 big-endian;
72 big-endian;
215 big-endian;
246 big-endian;
261 big-endian;
277 big-endian;
/rk3399_rockchip-uboot/arch/arc/
H A Dconfig.mk16 PLATFORM_CPPFLAGS += -mlittle-endian
22 PLATFORM_CPPFLAGS += -mbig-endian
/rk3399_rockchip-uboot/arch/sandbox/include/asm/
H A Dio.h59 #define out_arch(type,endian,a,v) write##type(cpu_to_##endian(v),a) argument
60 #define in_arch(type,endian,a) endian##_to_cpu(read##type(a)) argument
/rk3399_rockchip-uboot/drivers/crypto/fsl/
H A DKconfig36 bool "Big-endian access to Freescale Secure Boot"
47 bool "Little-endian access to Freescale Secure Boot"
/rk3399_rockchip-uboot/arch/xtensa/dts/
H A Dxtfpga.dtsi64 native-endian;
72 native-endian;
93 native-endian;
/rk3399_rockchip-uboot/arch/nios2/include/asm/
H A Dio.h123 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) argument
124 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) argument
/rk3399_rockchip-uboot/include/asm-generic/
H A Dunaligned.h20 #error invalid endian
/rk3399_rockchip-uboot/arch/arc/include/asm/
H A Dio.h250 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) argument
251 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) argument
/rk3399_rockchip-uboot/include/
H A Datf_common.h92 #define SPSR_32(mode, isa, endian, aif) \ argument
96 ((endian) & SPSR_E_MASK) << SPSR_E_SHIFT | \
/rk3399_rockchip-uboot/arch/x86/include/asm/
H A Dio.h79 #define write_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) argument
80 #define read_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) argument
/rk3399_rockchip-uboot/board/imgtec/malta/
H A Dflash-malta-boot.tcl14 if {[endian]=="big"} {
/rk3399_rockchip-uboot/drivers/ddr/fsl/
H A DKconfig16 Access DDR registers in big-endian
21 Access DDR registers in little-endian
/rk3399_rockchip-uboot/arch/nds32/include/asm/
H A Dio.h166 #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) argument
167 #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) argument

12