Searched refs:drm_dp_dpcd_write (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/drivers/video/drm/ |
| H A D | analogix_dp.c | 214 retval = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, 2); in analogix_dp_link_start() 222 retval = drm_dp_dpcd_write(&dp->aux, DP_DOWNSPREAD_CTRL, buf, 2); in analogix_dp_link_start() 260 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, in analogix_dp_link_start() 446 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_clock_recovery() 514 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_equalizer_training()
|
| H A D | drm_dp_helper.c | 221 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, in drm_dp_dpcd_write() function
|
| H A D | dw-dp.c | 620 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, lanes); in dw_dp_link_train_update_vs_emph() 687 ret = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, sizeof(buf)); in dw_dp_link_configure() 694 ret = drm_dp_dpcd_write(&dp->aux, DP_DOWNSPREAD_CTRL, buf, in dw_dp_link_configure()
|
| /rk3399_rockchip-uboot/include/drm/ |
| H A D | drm_dp_helper.h | 1195 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, 1225 return drm_dp_dpcd_write(aux, offset, &value, 1); in drm_dp_dpcd_writeb()
|