Searched refs:division (Results 1 – 5 of 5) sorted by relevance
88 @ The division loop for needed upper bit positions.104 @ The division loop for lower bit positions.144 @ If possible, branch for another shift in the division loop.191 @ eq -> division by 1: obvious enough...
44 @ at the left end of each 4 bit nibbles in the division loop53 @ division loop. Continue shifting until the divisor is 140 @ division loop. Continue shifting until the divisor is 257 subs r2, r1, #1 @ division by 1 or -1 ?
31 - spiclk is the clock for spi controller, output to IO after internal frequency division of the con…60 - clock_div: internal frequency division of the controller
210 void rk628_combtxphy_set_gvi_division_mode(struct rk628 *rk628, bool division) in rk628_combtxphy_set_gvi_division_mode() argument212 rk628->combtxphy.division_mode = division; in rk628_combtxphy_set_gvi_division_mode()
88 void rk628_combtxphy_set_gvi_division_mode(struct rk628 *rk628, bool division);