Searched refs:dclk_div (Results 1 – 2 of 2) sorted by relevance
19 u8 dclk_div; member
3934 cstate->crtc->vps[cstate->crtc_id].dclk_div = 2; /* div2 */ in rk3576_vop2_if_cfg()3936 cstate->crtc->vps[cstate->crtc_id].dclk_div = 1; /* no div */ in rk3576_vop2_if_cfg()3937 dclk_in_rate = mode->crtc_clock / cstate->crtc->vps[cstate->crtc_id].dclk_div; in rk3576_vop2_if_cfg()5185 vp_dclk_div = cstate->crtc->vps[cstate->crtc_id].dclk_div; in rockchip_vop2_init()