Searched refs:ctrl_regs_offset (Results 1 – 1 of 1) sorted by relevance
| /rk3399_rockchip-uboot/drivers/video/drm/ |
| H A D | rockchip_vop2.c | 4551 u32 ctrl_regs_offset = (dsc_id * 0x30); in vop2_dsc_enable() local
4572 vop2_mask_write(vop2, RK3588_DSC_8K_INIT_DLY + ctrl_regs_offset, EN_MASK, in vop2_dsc_enable()
4574 vop2_mask_write(vop2, RK3588_DSC_8K_SYS_CTRL + ctrl_regs_offset, DSC_PORT_SEL_MASK, in vop2_dsc_enable()
4587 vop2_mask_write(vop2, RK3588_DSC_8K_SYS_CTRL + ctrl_regs_offset, DSC_MAN_MODE_MASK, in vop2_dsc_enable()
4590 vop2_mask_write(vop2, RK3588_DSC_8K_SYS_CTRL + ctrl_regs_offset, DSC_MAN_MODE_MASK, in vop2_dsc_enable()
4595 vop2_mask_write(vop2, RK3588_DSC_8K_SYS_CTRL + ctrl_regs_offset, DSC_INTERFACE_MODE_MASK, in vop2_dsc_enable()
4597 vop2_mask_write(vop2, RK3588_DSC_8K_SYS_CTRL + ctrl_regs_offset, DSC_PIXEL_NUM_MASK, in vop2_dsc_enable()
4599 vop2_mask_write(vop2, RK3588_DSC_8K_SYS_CTRL + ctrl_regs_offset, DSC_TXP_CLK_DIV_MASK, in vop2_dsc_enable()
4601 vop2_mask_write(vop2, RK3588_DSC_8K_SYS_CTRL + ctrl_regs_offset, DSC_PXL_CLK_DIV_MASK, in vop2_dsc_enable()
4603 vop2_mask_write(vop2, RK3588_DSC_8K_SYS_CTRL + ctrl_regs_offset, DSC_CDS_CLK_DIV_MASK, in vop2_dsc_enable()
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