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Searched refs:ccsr (Results 1 – 14 of 14) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-imx/mx5/
H A Dclock.c236 u32 ccsr = readl(&mxc_ccm->ccsr); in get_lp_apm() local
238 if (ccsr & MXC_CCM_CCSR_LP_APM) in get_lp_apm()
648 u32 ccsr = readl(&mxc_ccm->ccsr); in config_pll_clk() local
654 writel(ccsr | MXC_CCM_CCSR_PLL1_SW_CLK_SEL, in config_pll_clk()
655 &mxc_ccm->ccsr); in config_pll_clk()
660 writel(ccsr & ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL, in config_pll_clk()
661 &mxc_ccm->ccsr); in config_pll_clk()
665 writel(ccsr | MXC_CCM_CCSR_PLL2_SW_CLK_SEL, in config_pll_clk()
666 &mxc_ccm->ccsr); in config_pll_clk()
671 writel(ccsr & ~MXC_CCM_CCSR_PLL2_SW_CLK_SEL, in config_pll_clk()
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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-armada100/
H A Dcpu.h46 u32 ccsr; /* 0x00C */ member
/rk3399_rockchip-uboot/board/armadeus/apf27/
H A Dfpga.c199 writel(ACFG_CCSR_VAL, &pll->ccsr); in apf27_fpga_setup()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-vf610/
H A Dcrm_regs.h18 u32 ccsr; member
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A Dclock.c1415 reg = readl(&mxc_ccm->ccsr); in select_ldb_di_clock_source()
1417 writel(reg, &mxc_ccm->ccsr); in select_ldb_di_clock_source()
1442 reg = readl(&mxc_ccm->ccsr); in select_ldb_di_clock_source()
1444 writel(reg, &mxc_ccm->ccsr); in select_ldb_di_clock_source()
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/vf610/
H A Dgeneric.c46 ccm_ccsr = readl(&ccm->ccsr); in get_mcu_main_clk()
/rk3399_rockchip-uboot/board/freescale/vf610twr/
H A Dvf610twr.c304 clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, in clock_init()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx27/
H A Dimx-regs.h126 u32 ccsr; /* Clock Control Status Register */ member
/rk3399_rockchip-uboot/board/toradex/colibri_vf/
H A Dcolibri_vf.c455 clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, pfd_clk_sel | in clock_init()
/rk3399_rockchip-uboot/arch/arm/lib/
H A Dasm-offsets.c156 DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr)); in main()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx5/
H A Dimx-regs.h305 u32 ccsr; member
H A Dcrm_regs.h33 u32 ccsr; member
/rk3399_rockchip-uboot/board/phytec/pcm052/
H A Dpcm052.c498 clrsetbits_le32(&ccm->ccsr, CCM_REG_CTRL_MASK, in clock_init()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx6/
H A Dcrm_regs.h26 u32 ccsr; member