Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL5 (Results 1 – 1 of 1) sorted by relevance
199 #define XUSB_PADCTL_UPHY_PLL_P0_CTL5 0x370 macro229 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in pcie_phy_enable()232 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in pcie_phy_enable()