Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL2 (Results 1 – 1 of 1) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra210/ |
| H A D | xusb-padctl.c | 185 #define XUSB_PADCTL_UPHY_PLL_P0_CTL2 0x364 macro
224 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
227 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
238 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
240 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
273 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
275 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
282 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
292 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
294 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
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