Home
last modified time | relevance | path

Searched refs:SW3 (Results 1 – 20 of 20) sorted by relevance

/rk3399_rockchip-uboot/board/freescale/p1010rdb/
H A DREADME.P1010RDB-PB66 SW3[1:8]= 10010000
73 SW4[1:4]= 1111 and SW3[3:4]= 00 for 16bit NOR boot
74 SW4[1:4]= 1010 and SW3[3:4]= 01 for 8bit NAND boot
75 SW4[1:4]= 0110 and SW3[3:4]= 00 for SPI boot
76 SW4[1:4]= 0111 and SW3[3:4]= 10 for SD boot
153 set SW1[8]=0, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board
157 set SW1[8]=1, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board
162 Set SW4[1:4]= 1010 and SW3[3:4]= 01, then power on the board
168 set SW4[1:4]= 0110 and SW3[3:4]= 00, then power on the board
175 set SW4[1:4]= 0111 and SW3[3:4]= 10, then power on the board
/rk3399_rockchip-uboot/doc/
H A DREADME.mpc85xxcds134 SW3=11101111
142 frequency can be changed by setting SW3:
146 SW3=XX00XXXX == CORE:CCB 2:1
159 SW3=00001000
173 SW3=11001000 (8X) (2:1)
176 SW3=X000XXXX == CORE:CCB 4:1
H A DREADME.b4860qds124 SW3 OFF OFF OFF ON OFF OFF ON OFF
136 SW3 [1:4] = 0001
140 SW3 [1:4] = 1000.
149 SW3 OFF OFF OFF ON OFF OFF ON OFF
161 SW3 [1:4] = 0001
165 SW3 [1:4] = 1000.
/rk3399_rockchip-uboot/board/freescale/t102xrdb/
H A DREADME194 set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot
196 set SW1[1:8] = '00010111', SW2[1] = '1', SW3[4] = '0' for NOR boot
202 via DIP-switch: set SW3[5:7] = '100'
205 via DIP-switch: set SW3[5:7] = '100'
210 via DIP-Switch: set SW3[5:7] = '000'
213 via DIP-switch: set SW3[5:7] = '000'
223 set SW1[1:8] = '10000010', SW2[1] = '1', SW3[4] = '1' for NAND boot
250 SW3[3] = '1' for SD card(or 'switch sd' by software)
251 SW3[3] = '0' for eMMC (or 'switch emmc' by software)
/rk3399_rockchip-uboot/board/freescale/t104xrdb/
H A DREADME288 SW3: 11100001
293 SW3: 11110001
298 SW3: 11100001
303 SW3: 11100001
310 SW3: 11100001
315 SW3: 11110001
320 SW3: 11100001
325 SW3: 11100001
/rk3399_rockchip-uboot/board/phytec/pfla02/
H A DREADME21 The dip switch "SW3" on the board let choose the boot device.
/rk3399_rockchip-uboot/include/power/
H A Dmc34vr500_pmic.h168 SW3, enumerator
/rk3399_rockchip-uboot/board/sbc8548/
H A DREADME216 SW3.1 CFG_HOST_AGT0 1* 0
217 SW3.2 CFG_HOST_AGT1 1* 0
218 SW3.3 CFG_HOST_AGT2 1* 0
219 SW3.4 CFG_IO_PORTS0 1* 0
220 SW3.5 CFG_IO_PORTS0 1 0*
221 SW3.6 CFG_IO_PORTS0 1 0*
/rk3399_rockchip-uboot/board/freescale/t208xrdb/
H A DREADME143 SW3[1:8] = '11100001'
154 set SW1[1:8] = '00010011', SW2[1] = '1', SW3[4] = '0' for NOR boot
159 via DIP-switch: set SW3[5:7] = '100'
163 via DIP-Switch: set SW3[5:7] = '000'
173 set SW1[1:8] = '10000010', SW2[1] = '1', SW3[4] = '1' for NAND boot
/rk3399_rockchip-uboot/board/freescale/mpc832xemds/
H A DREADME17 SW3 is switch 18 as silk-screened onto the board.
28 SW3[1-8]= 0000_1000 (core PLL setting, core enable)
/rk3399_rockchip-uboot/board/freescale/mpc8641hpcn/
H A DREADME43 SW3(1-7) = 0011000 CONFIG_SYS_VID = 0011000 :: VCORE = 1.2V
45 SW3(8) = 0 VCC_PLAT = 0 :: VCC_PLAT = 1.2V
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dimx7ulp-evk.dts123 sw3_reg: SW3 {
124 regulator-name = "SW3";
H A Dr8a7796-m3ulcb.dts51 label = "SW3";
H A Darmada-7040-db.dts45 * Boot device: SPI NOR, 0x32 (SW3)
H A Darmada-7040-db-nand.dts45 * Boot device: NAND, 0xE (SW3)
H A Dr8a7795-h3ulcb.dts67 label = "SW3";
H A Darmada-388-clearfog.dts451 /* The rear SW3 button */
/rk3399_rockchip-uboot/board/freescale/mpc837xemds/
H A DREADME26 SW3[1-8]= 0011_0000 (BOOTSEQ, ROMLOC setting)
/rk3399_rockchip-uboot/board/freescale/mpc8536ds/
H A DREADME71 SW3[1] = 0
/rk3399_rockchip-uboot/board/ti/ks2_evm/
H A DREADME189 1. Set the SW3 dip switch to "ARM MMC Boot mode" as per instruction at