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Searched refs:SPLL (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-exynos/include/mach/
H A Dclk.h18 #define SPLL 7 macro
/rk3399_rockchip-uboot/arch/arm/mach-exynos/
H A Dclock.c127 pllreg == SPLL) in exynos_get_pll_clk()
333 case SPLL: in exynos542x_get_pll_clk()
532 sclk = exynos542x_get_pll_clk(SPLL); in exynos542x_get_periph_rate()
1014 sclk = get_pll_clk(SPLL); in exynos5420_get_lcd_clk()
1050 const int reg_map[] = {0, CPLL, DPLL, MPLL, SPLL, IPLL, EPLL, in exynos5800_get_lcd_clk()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3576.h30 SPLL, enumerator