Searched refs:SCLK_1X_FSPI1_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance
396 SCLK_1X_FSPI1_DIV_SHIFT = 2, enumerator397 SCLK_1X_FSPI1_DIV_MASK = 0x7 << SCLK_1X_FSPI1_DIV_SHIFT,
421 SCLK_1X_FSPI1_DIV_SHIFT; in rv1126b_mmc_get_clk()514 SCLK_1X_FSPI1_DIV_SHIFT)); in rv1126b_mmc_set_clk()