Searched refs:SCLK_1X_FSPI1_DIV_MASK (Results 1 – 2 of 2) sorted by relevance
397 SCLK_1X_FSPI1_DIV_MASK = 0x7 << SCLK_1X_FSPI1_DIV_SHIFT, enumerator
420 div = (con & SCLK_1X_FSPI1_DIV_MASK) >> in rv1126b_mmc_get_clk()511 SCLK_1X_FSPI1_DIV_MASK, in rv1126b_mmc_set_clk()