Searched refs:PLL_V0PLL (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/include/dt-bindings/clock/ |
| H A D | rockchip,rk3506-cru.h | 12 #define PLL_V0PLL 2 macro
|
| H A D | rk3588-cru.h | 16 #define PLL_V0PLL 4 macro
|
| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3506.c | 69 [V0PLL] = PLL(pll_rk3328, PLL_V0PLL, RK3506_PLL_CON(8),
102 RK3506_CLK_DUMP(PLL_V0PLL, "v0pll"),
1032 case PLL_V0PLL: in rk3506_clk_get_rate()
|
| H A D | clk_rk3588.c | 56 [V0PLL] = PLL(pll_rk3588, PLL_V0PLL, RK3588_PLL_CON(88),
82 RK3588_CLK_DUMP(PLL_V0PLL, "v0pll", true),
1579 case PLL_V0PLL: in rk3588_clk_get_rate()
1726 case PLL_V0PLL: in rk3588_clk_set_rate()
1969 if (parent->id == PLL_V0PLL) in rk3588_dclk_vop_set_parent()
|