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Searched refs:PLL3 (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/doc/
H A DREADME.Heterogeneous-SoCs55 PLL5, PLL3 is Reserved(as mentioned in RM), so this define contains the
/rk3399_rockchip-uboot/drivers/video/tegra124/
H A Dsor.c566 DUMP_REG(PLL3); in dump_sor_reg()
707 tegra_sor_write_field(sor, PLL3, in tegra_dc_sor_enable_dp()
H A Dsor.h283 #define PLL3 0x1a macro