Searched refs:PLL2 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/drivers/video/tegra124/ |
| H A D | sor.c | 489 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
510 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
521 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
527 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_power_up()
565 DUMP_REG(PLL2); in dump_sor_reg()
702 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
716 tegra_sor_write_field(sor, PLL2, in tegra_dc_sor_enable_dp()
726 if (tegra_dc_sor_poll_register(sor, PLL2, in tegra_dc_sor_enable_dp()
734 tegra_sor_write_field(sor, PLL2, PLL2_AUX2_MASK | in tegra_dc_sor_enable_dp()
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| H A D | sor.h | 256 #define PLL2 0x19 macro
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