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Searched refs:PIN (Results 1 – 13 of 13) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra30/
H A Dpinmux.c11 #define PIN(pin, f0, f1, f2, f3) \ macro
26 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI),
27 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI),
28 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI),
29 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI),
30 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI),
31 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI),
32 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI),
33 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI),
34 PIN(ULPI_CLK_PY0, SPI1, RSVD2, UARTD, ULPI),
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra114/
H A Dpinmux.c11 #define PIN(pin, f0, f1, f2, f3) \ macro
26 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI),
27 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI),
28 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI),
29 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI),
30 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI),
31 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI),
32 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI),
33 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI),
34 PIN(ULPI_CLK_PY0, SPI1, SPI5, UARTD, ULPI),
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/
H A Dpinmux.c11 #define PIN(pin, f0, f1, f2, f3) \ macro
26 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI),
27 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI),
28 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI),
29 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI),
30 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI),
31 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI),
32 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI),
33 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI),
34 PIN(ULPI_CLK_PY0, SPI1, SPI5, UARTD, ULPI),
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra210/
H A Dpinmux.c11 #define PIN(pin, f0, f1, f2, f3) \ macro
26 PIN(SDMMC1_CLK_PM0, SDMMC1, RSVD1, RSVD2, RSVD3),
27 PIN(SDMMC1_CMD_PM1, SDMMC1, SPI3, RSVD2, RSVD3),
28 PIN(SDMMC1_DAT3_PM2, SDMMC1, SPI3, RSVD2, RSVD3),
29 PIN(SDMMC1_DAT2_PM3, SDMMC1, SPI3, RSVD2, RSVD3),
30 PIN(SDMMC1_DAT1_PM4, SDMMC1, SPI3, RSVD2, RSVD3),
31 PIN(SDMMC1_DAT0_PM5, SDMMC1, RSVD1, RSVD2, RSVD3),
34 PIN(SDMMC3_CLK_PP0, SDMMC3, RSVD1, RSVD2, RSVD3),
35 PIN(SDMMC3_CMD_PP1, SDMMC3, RSVD1, RSVD2, RSVD3),
36 PIN(SDMMC3_DAT0_PP5, SDMMC3, RSVD1, RSVD2, RSVD3),
[all …]
/rk3399_rockchip-uboot/drivers/pinctrl/meson/
H A Dpinctrl-meson-gxbb.c20 PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF),
21 PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF),
22 PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF),
24 static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
25 static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
26 static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
28 static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };
29 static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };
30 static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };
31 static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) };
[all …]
H A Dpinctrl-meson.h91 #define PIN(x, b) (b + x) macro
105 .pins = (const unsigned int[]){ PIN(gpio, b) }, \
131 #define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/
H A Dpinmux.c271 #define PIN(pingrp, f0, f1, f2, f3) \ macro
280 PIN(NONE, RSVD1, RSVD2, RSVD3, RSVD4)
286 PIN(ATA, IDE, NAND, GMI, RSVD4),
287 PIN(ATB, IDE, NAND, GMI, SDIO4),
288 PIN(ATC, IDE, NAND, GMI, SDIO4),
289 PIN(ATD, IDE, NAND, GMI, SDIO4),
290 PIN(CDEV1, OSC, PLLA_OUT, PLLM_OUT1, AUDIO_SYNC),
291 PIN(CDEV2, OSC, AHB_CLK, APB_CLK, PLLP_OUT4),
292 PIN(CSUS, PLLC_OUT1, PLLP_OUT2, PLLP_OUT3, VI_SENSOR_CLK),
293 PIN(DAP1, DAP1, RSVD2, GMI, SDIO2),
[all …]
/rk3399_rockchip-uboot/drivers/video/
H A Dbus_vcxk.c24 #define VCXK_INIT_PIN(PORT, PIN, DDR, I0O1) \ argument
26 writel(PIN, &pio->PORT.per); \
27 writel(PIN, &pio->PORT.DDR); \
28 writel(PIN, &pio->PORT.mddr); \
30 writel(PIN, &pio->PORT.puer); \
33 #define VCXK_SET_PIN(PORT, PIN) writel(PIN, &pio->PORT.sodr); argument
34 #define VCXK_CLR_PIN(PORT, PIN) writel(PIN, &pio->PORT.codr); argument
45 #define VCXK_INIT_PIN(PORT, PIN, DDR, I0O1) \ argument
46 if (I0O1) DDR |= PIN; else DDR &= ~PIN;
48 #define VCXK_SET_PIN(PORT, PIN) PORT |= PIN; argument
[all …]
/rk3399_rockchip-uboot/drivers/pinctrl/rockchip/
H A Dpinctrl-rockchip.h496 #define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG) \ argument
499 .pin = PIN, \
506 #define MR_DEFAULT(ID, PIN, FUNC, REG, VAL) \ argument
507 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_DEFAULT)
509 #define MR_TOPGRF(ID, PIN, FUNC, REG, VAL) \ argument
510 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_TOPGRF)
512 #define MR_PMUGRF(ID, PIN, FUNC, REG, VAL) \ argument
513 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_PMUGRF)
515 #define RK3588_PIN_BANK_FLAGS(ID, PIN, LABEL, M, P) \ argument
516 PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(ID, PIN, LABEL, M, M, M, M, P, P, P, P)
/rk3399_rockchip-uboot/doc/uImage.FIT/
H A Dsignature.txt431 Signature PIN ....: forced
433 Max. PIN lengths .: 32 32 32
434 PIN retry counter : 3 0 3
445 PIN = '123456' Admin PIN = '12345678'
484 …ed;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29
485 Label: OpenPGP card (User PIN (sig))
494 …315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%29
495 Label: OpenPGP card (User PIN)
508 …d;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29"
509 …PIN (sig))' with URL 'pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxx…
[all …]
/rk3399_rockchip-uboot/doc/
H A DREADME.bus_vcxk42 defines the number of the I/O line PIN in the port
/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-rockchip.c304 #define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG) \ argument
307 .pin = PIN, \
314 #define MR_DEFAULT(ID, PIN, FUNC, REG, VAL) \ argument
315 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_DEFAULT)
317 #define MR_TOPGRF(ID, PIN, FUNC, REG, VAL) \ argument
318 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_TOPGRF)
320 #define MR_PMUGRF(ID, PIN, FUNC, REG, VAL) \ argument
321 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROUTE_TYPE_PMUGRF)
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A DKconfig226 bool "Workaround for PIN MUX erratum A010539"