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Searched refs:PHY_ENABLECLK (Results 1 – 7 of 7) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Drockchip_mipi_dsi.h115 #define PHY_ENABLECLK DSI_HOST_BITS(0x0a0, 1, 2) macro
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_dsi.h131 #define PHY_ENABLECLK BIT(2) macro
H A Drk628_dsi.c1038 dsi_update_bits(rk628, dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, 0); in mipi_dphy_power_on()
1055 PHY_ENABLECLK, PHY_ENABLECLK); in mipi_dphy_power_on()
/rk3399_rockchip-uboot/drivers/video/drm/
H A Drk618_dsi.c110 #define PHY_ENABLECLK BIT(2) macro
652 dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK); in rk618_dsi_pre_enable()
709 dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, 0); in rk618_dsi_post_disable()
H A Dinno_video_combo_phy.c200 #define PHY_ENABLECLK BIT(2) macro
745 host_update_bits(inno, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK); in inno_video_phy_ttl_mode_enable()
H A Ddw_mipi_dsi.c158 #define PHY_ENABLECLK BIT(2) macro
357 dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK); in mipi_dphy_enableclk_assert()
363 dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, 0); in mipi_dphy_enableclk_deassert()
/rk3399_rockchip-uboot/drivers/video/rockchip/
H A Drk_mipi.c326 rk_mipi_dsi_write(regs, PHY_ENABLECLK, 1); in rk_mipi_phy_enable()