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Searched refs:PHY_DDR4_LPDDR3_RTT_DISABLE (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/include/dt-bindings/memory/
H A Drv1126-dram.h156 #define PHY_DDR4_LPDDR3_RTT_DISABLE (0) macro
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_rv1126.h98 #define PHY_DDR4_LPDDR3_RTT_DISABLE (0) macro
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drv1126-dram-default-timing.dtsi51 phy_lpddr2_odt = <PHY_DDR4_LPDDR3_RTT_DISABLE>;
/rk3399_rockchip-uboot/drivers/ram/rockchip/
H A Dsdram_rv1126.c690 {PHY_DDR4_LPDDR3_RTT_DISABLE, 0},
1592 writel(PHY_DDR4_LPDDR3_RTT_DISABLE, in data_training_rg()