Searched refs:PCIE30_PHY_GRF (Results 1 – 1 of 1) sorted by relevance
562 #define PCIE30_PHY_GRF 0xFDCB8000 macro594 writel(0x80008000, PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON9); in pcie_cru_init()597 PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON9); //map to access sram in pcie_cru_init()601 writel(0x0 | (0x1 << 31), PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON3); in pcie_cru_init()604 writel((0x0) | (0x1 << 25), PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON5); in pcie_cru_init()606 writel((0x0) | (0x1 << 25), PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON6); in pcie_cru_init()610 PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON4); //sdram_ld_done in pcie_cru_init()612 PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON4); //sdram_bypass in pcie_cru_init()619 reg = readl(PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_STATUS0); in pcie_cru_init()626 PCIE30_PHY_GRF + GRF_PCIE30PHY_RK3568_CON9); //map to access sram in pcie_cru_init()[all …]