Searched refs:MASK (Results 1 – 8 of 8) sorted by relevance
| /rk3399_rockchip-uboot/board/micronas/vct/ |
| H A D | gpio.c | 23 #define MASK(pin) (1 << ((pin) & 0x1F)) macro
47 clrsetbits(GPIO_SWPORTA_DDR(gpio_base), MASK(pin), 0); in vct_gpio_dir()
49 clrsetbits(GPIO_SWPORTA_DDR(gpio_base), 0, MASK(pin)); in vct_gpio_dir()
61 clrsetbits(GPIO_SWPORTA_DR(gpio_base), MASK(pin), 0); in vct_gpio_set()
63 clrsetbits(GPIO_SWPORTA_DR(gpio_base), 0, MASK(pin)); in vct_gpio_set()
74 return ((value & MASK(pin)) ? 1 : 0); in vct_gpio_get()
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| /rk3399_rockchip-uboot/drivers/gpio/ |
| H A D | rk_gpio.c | 36 #define CLRBITS_LE32(REG, MASK) WRITE_REG(REG, READ_REG(REG) & ~(MASK)) argument
37 #define SETBITS_LE32(REG, MASK) WRITE_REG(REG, READ_REG(REG) | (MASK)) argument
38 #define CLRSETBITS_LE32(REG, MASK, VAL) WRITE_REG(REG, \ argument
39 (READ_REG(REG) & ~(MASK)) | (VAL))
44 #define CLRBITS_LE32(REG, MASK) clrbits_le32(REG, MASK) argument
45 #define SETBITS_LE32(REG, MASK) setbits_le32(REG, MASK) argument
46 #define CLRSETBITS_LE32(REG, MASK, VAL) clrsetbits_le32(REG, MASK, VAL) argument
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| /rk3399_rockchip-uboot/include/ |
| H A D | lattice.h | 131 #define MASK 0x15 /* The following data stream is used as mask. */ macro
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| H A D | sym53c8xx.h | 530 #define MASK(D,M) (0x00040000 | (((M ^ 0xff) & 0xff) << 8ul)|((D) & 0xff)) macro
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| /rk3399_rockchip-uboot/board/Barix/ipam390/ |
| H A D | ipam390-ais-uart.cfg | 144 ; MASK: | mask |
148 ;MASK = 0x00FF0000
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| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xx/ |
| H A D | Kconfig | 78 hex "MASK for setting SCCR register"
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.Heterogeneous-SoCs | 30 MASK, similar to the code written for PowerPC
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| /rk3399_rockchip-uboot/drivers/fpga/ |
| H A D | ivm_core.c | 445 case MASK: in ispVMMemManager()
1202 case MASK: in ispVMDataCode()
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