Searched refs:L1CSR2_DCWS (Results 1 – 3 of 3) sorted by relevance
221 oris r3,r3,(L1CSR2_DCWS)@h233 andis. r3,r3,(L1CSR2_DCWS)@h
776 mtspr(L1CSR2, (mfspr(L1CSR2) | L1CSR2_DCWS)); in cpu_init_r()792 if (mfspr(L1CSR2) & L1CSR2_DCWS) in cpu_init_r()
498 #define L1CSR2_DCWS 0x40000000 /* Data Cache Write Shadow */ macro