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Searched refs:HIGH (Results 1 – 25 of 27) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Ddram_sunxi_dw.c122 MBUS_CONF( GPU, true, HIGH, 0, 1536, 1024, 256); in mctl_set_master_priority_h3()
125 MBUS_CONF( VE, true, HIGH, 0, 1792, 1600, 256); in mctl_set_master_priority_h3()
127 MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64); in mctl_set_master_priority_h3()
130 MBUS_CONF( DI, true, HIGH, 0, 1024, 256, 64); in mctl_set_master_priority_h3()
132 MBUS_CONF(DE_CFD, true, HIGH, 0, 1024, 288, 64); in mctl_set_master_priority_h3()
147 MBUS_CONF( GPU, false, HIGH, 0, 1536, 1400, 256); in mctl_set_master_priority_a64()
149 MBUS_CONF( DMA, true, HIGH, 0, 256, 80, 100); in mctl_set_master_priority_a64()
150 MBUS_CONF( VE, true, HIGH, 0, 1792, 1600, 256); in mctl_set_master_priority_a64()
151 MBUS_CONF( CSI, true, HIGH, 0, 256, 128, 0); in mctl_set_master_priority_a64()
152 MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64); in mctl_set_master_priority_a64()
[all …]
/rk3399_rockchip-uboot/board/renesas/sh7785lcr/
H A Drtl8169_mac.c64 EEDI(HIGH); in sh7785lcr_bitset()
70 EECLK(HIGH); in sh7785lcr_bitset()
82 EECLK(HIGH); in sh7785lcr_bitget()
171 EECS(HIGH); in sh7785lcr_datawrite()
192 EECS(HIGH); in sh7785lcr_macerase()
225 EECS(HIGH); in sh7785lcr_macdtrd()
254 EECS(HIGH); in sh7785lcr_eepewen()
H A Drtl8169.h14 #define HIGH 1 macro
/rk3399_rockchip-uboot/board/nvidia/p2371-2180/
H A Dpinmux-config-p2371-2180.h101 PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
102 PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
103 PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
104 PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
105 PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
161 PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
162 PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
240 PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
244 PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
245 PINCFG(USB_VBUS_EN1_PCC5, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
/rk3399_rockchip-uboot/board/nvidia/p2371-0000/
H A Dpinmux-config-p2371-0000.h90 PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
91 PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
92 PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
93 PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
94 PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
150 PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
151 PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
229 PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
233 PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap5/
H A DKconfig95 bool "OPP HIGH"
119 bool "OPP HIGH"
143 bool "OPP HIGH"
/rk3399_rockchip-uboot/board/nvidia/p2571/
H A Dpinmux-config-p2571.h125 PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
126 PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
204 PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
208 PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
209 PINCFG(USB_VBUS_EN1_PCC5, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
/rk3399_rockchip-uboot/doc/device-tree-bindings/thermal/
H A Drockchip-thermal.txt19 1:HIGH.
/rk3399_rockchip-uboot/board/nvidia/dalmore/
H A Dpinmux-config-dalmore.h269 DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
270 DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
/rk3399_rockchip-uboot/board/nvidia/e2220-1170/
H A Dpinmux-config-e2220-1170.h238 PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
242 PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3288-rock2-som.dtsi257 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
H A Drk3288-tinker.dtsi430 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
H A Drk3399-firefly.dts613 /* tshut polarity 0:LOW 1:HIGH */
H A Ddra72-evm-common.dtsi295 * SW5.9 (GPMC_WPN) = OFF (HIGH)
H A Drk3288-veyron.dtsi602 tsadc-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
H A Ddra7-evm.dts250 * SW5.9 (GPMC_WPN) = OFF (HIGH)
H A Drv1103b.dtsi842 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
H A Drv1106.dtsi520 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
H A Drk3506.dtsi1225 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
H A Drk3562.dtsi2100 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
H A Drk3528.dtsi1658 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
H A Drk3588s.dtsi2103 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
H A Drk3568.dtsi2523 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
/rk3399_rockchip-uboot/board/toradex/colibri_imx6/
H A Dpf0100_otp.inc18 …sed -i -e 's/^PWRON: HIGH/\{pmic_pwr, 0, 1},/g' -e 's/^PWRON:LOW/\{pmic_pwr, 0, 0},/g' pf0100_otp.…
/rk3399_rockchip-uboot/board/toradex/apalis_imx6/
H A Dpf0100_otp.inc18 …sed -i -e 's/^PWRON: HIGH/\{pmic_pwr, 0, 1},/g' -e 's/^PWRON:LOW/\{pmic_pwr, 0, 0},/g' pf0100_otp.…

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