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/rk3399_rockchip-uboot/examples/standalone/
H A DREADME.smc91111_eeprom137 LAN91C111 EEPROM <- Non-volatile
143 To set the EEPROM MAC address to 12:34:56:78:9A:BC
147 Writing EEPROM register 20 with 3412
150 Writing EEPROM register 21 with 7856
153 Writing EEPROM register 22 with bc9a
154 EEPROM contents copied to MAC
158 Current MAC Address in EEPROM 12:34:56:78:9a:bc
178 - D : Dump the LAN91C111 EEPROM contents
180 - C : Copies the MAC address from the EEPROM to the LAN91C111
181 - W : Write a register in the EEPROM or in the MAC
[all …]
H A Dsmc91111_eeprom.c23 #define EEPROM 0x1 macro
150 what = EEPROM; in smc91111_eeprom()
/rk3399_rockchip-uboot/board/ti/common/
H A DKconfig5 Evaluation Boards which have I2C based EEPROM detection
8 int "Board EEPROM's I2C bus address"
13 hex "Board EEPROM's I2C chip address"
/rk3399_rockchip-uboot/board/boundary/nitrogen6x/
H A D6x_upgrade.txt34 echo "Error re-reading EEPROM" ;
38 echo "Error reading boot loader from EEPROM" ;
41 echo "Error initializing EEPROM" ;
/rk3399_rockchip-uboot/doc/
H A DI2C_Edge_Conditions5 and the CPU was reset. This may result in EEPROM data corruption.
18 The EEPROM sees:
22 4) device address "EEPROM interprets this as offset"
23 5) Offset in device, "EEPROM interprets this as data to write"
H A DREADME.mpc85xx-sd-spi-boot10 When booting from an EEPROM, boot_format generates a binary image that is used
11 to boot from this EEPROM.
H A DREADME.srio-pcie-boot-corenet20 d) Slave has its own EEPROM for RCW and PBI.
27 | NorFlash|<----->| Master |SRIO or PCIE | Slave |<---->[EEPROM]
/rk3399_rockchip-uboot/board/gateworks/gw_ventana/
H A DKconfig15 Provides access to EEPROM configuration on Gateworks Ventana
H A DREADME9 information from an EEPROM on the board programmed at the factory and supports
181 Gateworks Ventana, we use an EEPROM register on i2c-0 at 0x50:0x00:
232 # create args based on env, board, EEPROM, and dtb
/rk3399_rockchip-uboot/board/lego/ev3/
H A DREADME11 The EV3 contains a bootloader in EEPROM that loads u-boot.bin from address 0x0
24 The EEPROM contains a program for uploading an image file to the flash memory.
/rk3399_rockchip-uboot/board/freescale/mpc8349itx/
H A DREADME11 A) One 8MB on-board flash EEPROM chip, instead of two.
29 E BOOT1 ON (0) Flash EEPROM boot device
31 G I2C-WP ON (0) I2C EEPROM write protection
32 H F_WP OFF (1) Flash EEPROM write protection
58 3.2 Flash EEPROM layout.
/rk3399_rockchip-uboot/board/keymile/km83xx/
H A DREADME.kmeter13 1. Alternative Boot EEPROM
6 configuration from a serial EEPROM. During the development and debugging
/rk3399_rockchip-uboot/drivers/misc/
H A DKconfig207 integrated 64-byte EEPROM, four programmable non-volatile I/O pins
307 hex "Chip address of the EEPROM device"
311 int "I2C bus of the EEPROM device."
315 int "Size in bytes of the EEPROM device"
322 The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS.
330 int "Length in bytes of the EEPROM memory array address"
336 hex "EEPROM Address Overflow"
339 EEPROM chips that implement "address overflow" are ones
/rk3399_rockchip-uboot/board/freescale/mpc8569mds/
H A DREADME38 The command - "mac", is introduced to set on-board system EEPROM in the format
42 => mac i NXID /* Set NXID to this EEPROM */
/rk3399_rockchip-uboot/board/bachmann/ot1200/
H A DREADME20 are making use of EDID data stored in an i2c EEPROM.
/rk3399_rockchip-uboot/board/birdland/bav335x/
H A DREADME13 If the BAV335x EEPROM is populated and programmed, the board will
/rk3399_rockchip-uboot/board/sbc8548/
H A DREADME70 EEPROM data to read what memory is installed.
73 SPD EEPROM to land at the same address as the DDR2 SPD EEPROM, so
269 b0_0000 1fff 8 8kB EEPROM
/rk3399_rockchip-uboot/env/
H A DKconfig44 bool "Environment in EEPROM"
47 Use this if you have an EEPROM or similar serial access
54 environment area within the total memory of your EEPROM.
62 EEPROM, which holds the environment, is on the I2C bus.
65 if you have an Environment on an EEPROM reached over
67 EEPROM. For example:
71 EEPROM which holds the environment, is reached over
/rk3399_rockchip-uboot/board/freescale/p1_p2_rdb_pc/
H A DREADME25 As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
/rk3399_rockchip-uboot/board/freescale/p1010rdb/
H A DREADME.P1010RDB-PB19 - 256K bit M24256 I2C EEPROM
20 - I2C Board EEPROM 128x8 bit memory
H A DREADME.P1010RDB-PA17 - 256 Kbit M24256 I2C EEPROM
19 - I2C Board EEPROM 128x8 bit memory
/rk3399_rockchip-uboot/board/freescale/c29xpcie/
H A DREADME15 - 1 Mbit AT24C1024 I2C EEPROM
/rk3399_rockchip-uboot/board/work-microwave/work_92105/
H A DREADME9 - EEPROM (24M01-compatible)
/rk3399_rockchip-uboot/board/freescale/mpc8536ds/
H A DREADME52 SPI EEPROM, to the target memory, e.g. SDRAM or L2SRAM, then boot from it.
/rk3399_rockchip-uboot/doc/driver-model/
H A Dremoteproc-framework.txt72 allow us to start the processor(image from a EEPROM/OTP) etc.

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